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arch: arm: Add initial support for Cortex-M55 Core

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Add initial support for the Cortex-M55 Core which is an implementation
of the Armv8.1-M mainline architecture and includes support for the
M‑profile Vector Extension (MVE).

The support is based on the Cortex-M33 support that already exists in
Zephyr.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2021-02-13 15:07:37 -06:00 • committed by Kumar Gala
commit 95e4b3eb2c
12 changed files with 111 additions and 9 deletions
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4
include/arch/arm/aarch32/cortex_m/cmsis.h
View file

@ -82,6 +82,8 @@ typedef enum {
#define __CM23_REV 0
#elif defined(CONFIG_CPU_CORTEX_M33)
#define __CM33_REV 0
#elif defined(CONFIG_CPU_CORTEX_M55)
#define __CM55_REV 0
#else
#error "Unknown Cortex-M device"
#endif
@ -117,6 +119,8 @@ typedef enum {
#include <core_cm23.h>
#elif defined(CONFIG_CPU_CORTEX_M33)
#include <core_cm33.h>
#elif defined(CONFIG_CPU_CORTEX_M55)
#include <core_cm55.h>
#else
#error "Unknown Cortex-M device"
#endif

6
include/arch/arm/aarch32/cortex_m/memory_map.h
View file

@ -65,7 +65,9 @@
#define _PPB_INT_RSVD_1 0xE0003000
#define _PPB_INT_SCS 0xE000E000
#define _PPB_INT_RSVD_2 0xE000F000
#elif defined(CONFIG_CPU_CORTEX_M23) || defined(CONFIG_CPU_CORTEX_M33)
#elif defined(CONFIG_CPU_CORTEX_M23) || \
defined(CONFIG_CPU_CORTEX_M33) || \
defined(CONFIG_CPU_CORTEX_M55)
#define _PPB_INT_RSVD_0 0xE0000000
#define _PPB_INT_SCS 0xE000E000
#define _PPB_INT_SCB 0xE000ED00
@ -86,7 +88,7 @@
#define _PPB_EXT_PPB 0xE0042000
#define _PPB_EXT_ROM_TABLE 0xE00FF000
#define _PPB_EXT_END_ADDR 0xE00FFFFF
#elif defined(CONFIG_CPU_CORTEX_M33)
#elif defined(CONFIG_CPU_CORTEX_M33) || defined(CONFIG_CPU_CORTEX_M55)
#undef _PPB_EXT_BASE_ADDR
#define _PPB_EXT_BASE_ADDR 0xE0044000
#define _PPB_EXT_ROM_TABLE 0xE00FF000

3
include/arch/arm/aarch32/cortex_m/mpu/arm_mpu.h
View file

@ -12,7 +12,8 @@
defined(CONFIG_CPU_CORTEX_M7)
#include <arch/arm/aarch32/cortex_m/mpu/arm_mpu_v7m.h>
#elif defined(CONFIG_CPU_CORTEX_M23) || \
defined(CONFIG_CPU_CORTEX_M33)
defined(CONFIG_CPU_CORTEX_M33) || \
defined(CONFIG_CPU_CORTEX_M55)
#include <arch/arm/aarch32/cortex_m/mpu/arm_mpu_v8m.h>
#else
#error "Unsupported ARM CPU"

10
include/arch/arm/aarch32/cortex_m/nvic.h
View file

@ -7,11 +7,13 @@
#ifndef ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_CORTEX_M_NVIC_H_
#define ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_CORTEX_M_NVIC_H_
#if defined(CONFIG_ARMV8_M_BASELINE) || defined(CONFIG_ARMV8_M_MAINLINE)
/* The order here is on purpose since ARMv8-M SoCs may define
* CONFIG_ARMV6_M_ARMV8_M_BASELINE or CONFIG_ARMV7_M_ARMV8_M_MAINLINE
* so we want to check for ARMv8-M first.
#if defined(CONFIG_ARMV8_1_M_MAINLINE)
/* The order here is on purpose since ARMv8.1-M SoCs may define
* CONFIG_ARMV6_M_ARMV8_M_BASELINE, CONFIG_ARMV7_M_ARMV8_M_MAINLINE or
* CONFIG_ARMV8_M_MAINLINE so we want to check for ARMv8.1-M first.
*/
#define NVIC_NODEID DT_INST(0, arm_v8_1m_nvic)
#elif defined(CONFIG_ARMV8_M_BASELINE) || defined(CONFIG_ARMV8_M_MAINLINE)
#define NVIC_NODEID DT_INST(0, arm_v8m_nvic)
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
#define NVIC_NODEID DT_INST(0, arm_v7m_nvic)