drivers: can: add NXP LPC MCAN front-end for the Bosch MCAN driver
Add a NXP LPC MCAN-specific front-end for the generic Bosch MCAN driver. Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This commit is contained in:
Henrik Brix Andersen
Carles Cufí
parent
78075457ba
commit
93c6b7413b
6 changed files with 319 additions and 7 deletions
266
drivers/can/can_mcux_mcan.c
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266
drivers/can/can_mcux_mcan.c
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/*
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* Copyright (c) 2021 Henrik Brix Andersen <henrik@brixandersen.dk>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <device.h>
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#include <drivers/can.h>
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#include <drivers/clock_control.h>
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#include <logging/log.h>
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#include "can_mcan.h"
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LOG_MODULE_REGISTER(mcux_mcan, CONFIG_CAN_LOG_LEVEL);
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#define DT_DRV_COMPAT nxp_lpc_mcan
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struct mcux_mcan_config {
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struct can_mcan_config mcan;
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const struct device *clock_dev;
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clock_control_subsys_t clock_subsys;
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void (*irq_config_func)(const struct device *dev);
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};
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struct mcux_mcan_data {
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struct can_mcan_data mcan;
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struct can_mcan_msg_sram msg_ram __nocache;
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};
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static int mcux_mcan_set_mode(const struct device *dev, enum can_mode mode)
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{
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const struct mcux_mcan_config *config = dev->config;
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return can_mcan_set_mode(&config->mcan, mode);
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}
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static int mcux_mcan_set_timing(const struct device *dev,
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const struct can_timing *timing,
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const struct can_timing *timing_data)
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{
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const struct mcux_mcan_config *config = dev->config;
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return can_mcan_set_timing(&config->mcan, timing, timing_data);
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}
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static int mcux_mcan_send(const struct device *dev, const struct zcan_frame *msg,
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k_timeout_t timeout, can_tx_callback_t callback,
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void *user_data)
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{
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const struct mcux_mcan_config *config = dev->config;
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struct mcux_mcan_data *data = dev->data;
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return can_mcan_send(&config->mcan, &data->mcan, &data->msg_ram,
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msg, timeout, callback, user_data);
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}
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static int mcux_mcan_add_rx_filter(const struct device *dev,
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can_rx_callback_t cb,
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void *user_data,
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const struct zcan_filter *filter)
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{
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struct mcux_mcan_data *data = dev->data;
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return can_mcan_add_rx_filter(&data->mcan, &data->msg_ram,
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cb, user_data, filter);
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}
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static void mcux_mcan_remove_rx_filter(const struct device *dev, int filter_id)
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{
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struct mcux_mcan_data *data = dev->data;
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can_mcan_remove_rx_filter(&data->mcan, &data->msg_ram, filter_id);
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}
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static enum can_state mcux_mcan_get_state(const struct device *dev,
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struct can_bus_err_cnt *err_cnt)
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{
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const struct mcux_mcan_config *config = dev->config;
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return can_mcan_get_state(&config->mcan, err_cnt);
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}
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static void mcux_mcan_set_state_change_callback(const struct device *dev,
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can_state_change_callback_t cb)
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{
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struct mcux_mcan_data *data = dev->data;
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data->mcan.state_change_cb = cb;
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}
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static int mcux_mcan_get_core_clock(const struct device *dev, uint32_t *rate)
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{
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const struct mcux_mcan_config *config = dev->config;
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return clock_control_get_rate(config->clock_dev, config->clock_subsys,
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rate);
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}
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static void mcux_mcan_line_0_isr(const struct device *dev)
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{
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const struct mcux_mcan_config *config = dev->config;
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struct mcux_mcan_data *data = dev->data;
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can_mcan_line_0_isr(&config->mcan, &data->msg_ram, &data->mcan);
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}
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static void mcux_mcan_line_1_isr(const struct device *dev)
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{
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const struct mcux_mcan_config *config = dev->config;
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struct mcux_mcan_data *data = dev->data;
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can_mcan_line_1_isr(&config->mcan, &data->msg_ram, &data->mcan);
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}
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static int mcux_mcan_init(const struct device *dev)
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{
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const struct mcux_mcan_config *config = dev->config;
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struct mcux_mcan_data *data = dev->data;
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int err;
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err = clock_control_on(config->clock_dev, config->clock_subsys);
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if (err) {
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LOG_ERR("failed to enable clock (err %d)", err);
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return -EINVAL;
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}
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err = can_mcan_init(dev, &config->mcan, &data->msg_ram, &data->mcan);
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if (err) {
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LOG_ERR("failed to initialize mcan (err %d)", err);
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return err;
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}
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config->irq_config_func(dev);
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return 0;
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}
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static const struct can_driver_api mcux_mcan_driver_api = {
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.set_mode = mcux_mcan_set_mode,
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.set_timing = mcux_mcan_set_timing,
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.send = mcux_mcan_send,
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.add_rx_filter = mcux_mcan_add_rx_filter,
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.remove_rx_filter = mcux_mcan_remove_rx_filter,
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#ifndef CONFIG_CAN_AUTO_BUS_OFF_RECOVERY
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.recover = can_mcan_recover,
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#endif /* CONFIG_CAN_AUTO_BUS_OFF_RECOVERY */
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.get_state = mcux_mcan_get_state,
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.set_state_change_callback = mcux_mcan_set_state_change_callback,
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.get_core_clock = mcux_mcan_get_core_clock,
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/*
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* MCUX MCAN timing limits are specified in the "Nominal bit timing and
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* prescaler register (NBTP)" table in the SoC reference manual.
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*
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* Note that the values here are the "physical" timing limits, whereas
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* the register field limits are physical values minus 1 (which is
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* handled by the register assignments in the common MCAN driver code).
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*/
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.timing_min = {
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.sjw = 1,
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.prop_seg = 0,
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.phase_seg1 = 1,
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.phase_seg2 = 1,
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.prescaler = 1
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},
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.timing_max = {
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.sjw = 128,
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.prop_seg = 0,
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.phase_seg1 = 256,
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.phase_seg2 = 128,
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.prescaler = 512,
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},
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#ifdef CONFIG_CAN_FD_MODE
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/*
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* MCUX MCAN data timing limits are specified in the "Data bit timing
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* and prescaler register (DBTP)" table in the SoC reference manual.
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*
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* Note that the values here are the "physical" timing limits, whereas
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* the register field limits are physical values minus 1 (which is
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* handled by the register assignments in the common MCAN driver code).
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*/
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.timing_min_data = {
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.sjw = 1,
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.prop_seg = 0,
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.phase_seg1 = 1,
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.phase_seg2 = 1,
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.prescaler = 1,
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},
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.timing_max_data = {
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.sjw = 16,
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.prop_seg = 0,
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.phase_seg1 = 16,
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.phase_seg2 = 16,
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.prescaler = 32,
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}
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#endif /* CONFIG_CAN_FD_MODE */
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};
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#ifdef CONFIG_CAN_FD_MODE
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#define MCUX_MCAN_MCAN_INIT(n) \
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{ \
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.can = (struct can_mcan_reg *)DT_INST_REG_ADDR(n), \
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.bus_speed = DT_INST_PROP(n, bus_speed), \
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.sjw = DT_INST_PROP(n, sjw), \
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.sample_point = DT_INST_PROP_OR(n, sample_point, 0), \
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.prop_ts1 = DT_INST_PROP_OR(n, prop_seg, 0) + \
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DT_INST_PROP_OR(n, phase_seg1, 0), \
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.ts2 = DT_INST_PROP_OR(n, phase_seg2, 0), \
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.bus_speed_data = DT_INST_PROP(n, bus_speed_data), \
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.sjw_data = DT_INST_PROP(n, sjw_data), \
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.sample_point_data = \
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DT_INST_PROP_OR(n, sample_point_data, 0), \
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.prop_ts1_data = DT_INST_PROP_OR(n, prop_seg_data, 0) + \
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DT_INST_PROP_OR(n, phase_seg1_data, 0), \
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.ts2_data = DT_INST_PROP_OR(n, phase_seg2_data, 0), \
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.tx_delay_comp_offset = \
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DT_INST_PROP(n, tx_delay_comp_offset) \
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}
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#else /* CONFIG_CAN_FD_MODE */
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#define MCUX_MCAN_MCAN_INIT(n) \
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{ \
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.can = (struct can_mcan_reg *)DT_INST_REG_ADDR(n), \
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.bus_speed = DT_INST_PROP(n, bus_speed), \
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.sjw = DT_INST_PROP(n, sjw), \
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.sample_point = DT_INST_PROP_OR(n, sample_point, 0), \
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.prop_ts1 = DT_INST_PROP_OR(n, prop_seg, 0) + \
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DT_INST_PROP_OR(n, phase_seg1, 0), \
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.ts2 = DT_INST_PROP_OR(n, phase_seg2, 0), \
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}
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#endif /* !CONFIG_CAN_FD_MODE */
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#define MCUX_MCAN_INIT(n) \
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static void mcux_mcan_irq_config_##n(const struct device *dev); \
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\
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static const struct mcux_mcan_config mcux_mcan_config_##n = { \
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.mcan = MCUX_MCAN_MCAN_INIT(n), \
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.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)), \
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.clock_subsys = (clock_control_subsys_t) \
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DT_INST_CLOCKS_CELL(n, name), \
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.irq_config_func = mcux_mcan_irq_config_##n, \
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}; \
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\
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static struct mcux_mcan_data mcux_mcan_data_##n; \
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\
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DEVICE_DT_INST_DEFINE(n, &mcux_mcan_init, NULL, \
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&mcux_mcan_data_##n, \
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&mcux_mcan_config_##n, \
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POST_KERNEL, \
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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&mcux_mcan_driver_api); \
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\
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static void mcux_mcan_irq_config_##n(const struct device *dev) \
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{ \
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IRQ_CONNECT(DT_INST_IRQ_BY_IDX(n, 0, irq), \
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DT_INST_IRQ_BY_IDX(n, 0, priority), \
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mcux_mcan_line_0_isr, \
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DEVICE_DT_INST_GET(n), 0); \
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irq_enable(DT_INST_IRQ_BY_IDX(n, 0, irq)); \
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\
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IRQ_CONNECT(DT_INST_IRQ_BY_IDX(n, 1, irq), \
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DT_INST_IRQ_BY_IDX(n, 1, priority), \
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mcux_mcan_line_1_isr, \
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DEVICE_DT_INST_GET(n), 0); \
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irq_enable(DT_INST_IRQ_BY_IDX(n, 1, irq)); \
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}
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DT_INST_FOREACH_STATUS_OKAY(MCUX_MCAN_INIT)
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