riscv: Move directory to *-privileged
Because the spec is "privileged" not "privilege". Signed-off-by: Carlo Caione <ccaione@baylibre.com>
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119 changed files with 16 additions and 16 deletions
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@ -80,10 +80,10 @@
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/soc/posix/ @aescolar @daor-oti
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/soc/posix/ @aescolar @daor-oti
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/soc/riscv/ @kgugala @pgielda
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/soc/riscv/ @kgugala @pgielda
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/soc/riscv/openisa*/ @dleach02
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/soc/riscv/openisa*/ @dleach02
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/soc/riscv/riscv-privilege/andes_v5/ @cwshu @kevinwang821020 @jimmyzhe
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/soc/riscv/riscv-privileged/andes_v5/ @cwshu @kevinwang821020 @jimmyzhe
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/soc/riscv/riscv-privilege/neorv32/ @henrikbrixandersen
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/soc/riscv/riscv-privileged/neorv32/ @henrikbrixandersen
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/soc/riscv/riscv-privilege/gd32vf103/ @soburi
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/soc/riscv/riscv-privileged/gd32vf103/ @soburi
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/soc/riscv/riscv-privilege/niosv/ @sweeaun
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/soc/riscv/riscv-privileged/niosv/ @sweeaun
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/soc/x86/ @dcpleung @nashif @aasthagr
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/soc/x86/ @dcpleung @nashif @aasthagr
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/arch/xtensa/ @dcpleung @andyross @nashif
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/arch/xtensa/ @dcpleung @andyross @nashif
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/soc/xtensa/ @dcpleung @andyross @nashif
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/soc/xtensa/ @dcpleung @andyross @nashif
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@ -2106,7 +2106,7 @@ GD32 Platforms:
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- dts/*/gigadevice/
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- dts/*/gigadevice/
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- dts/bindings/*/*gd32*
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- dts/bindings/*/*gd32*
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- soc/arm/gigadevice/
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- soc/arm/gigadevice/
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- soc/riscv/riscv-privilege/gd32vf103/
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- soc/riscv/riscv-privileged/gd32vf103/
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- scripts/west_commands/*/*gd32*
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- scripts/west_commands/*/*gd32*
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labels:
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labels:
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- "platform: GD32"
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- "platform: GD32"
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@ -301,7 +301,7 @@ static inline uint64_t arch_k_cycle_get_64(void)
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#endif /*_ASMLANGUAGE */
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#endif /*_ASMLANGUAGE */
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#if defined(CONFIG_SOC_FAMILY_RISCV_PRIVILEGED)
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#if defined(CONFIG_SOC_FAMILY_RISCV_PRIVILEGED)
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#include <zephyr/arch/riscv/riscv-privilege/asm_inline.h>
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#include <zephyr/arch/riscv/riscv-privileged/asm_inline.h>
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#endif
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#endif
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@ -14,7 +14,7 @@
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*/
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*/
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#if defined(__GNUC__)
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#if defined(__GNUC__)
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#include <zephyr/arch/riscv/riscv-privilege/asm_inline_gcc.h>
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#include <zephyr/arch/riscv/riscv-privileged/asm_inline_gcc.h>
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#else
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#else
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#error "Supports only GNU C compiler"
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#error "Supports only GNU C compiler"
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#endif
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#endif
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@ -5,6 +5,6 @@
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#
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#
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zephyr_sources(
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zephyr_sources(
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../riscv-privilege/common/soc_irq.S
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../riscv-privileged/common/soc_irq.S
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../riscv-privilege/common/vector.S
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../riscv-privileged/common/vector.S
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)
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)
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@ -7,7 +7,7 @@
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#ifndef __RISCV32_LITEX_VEXRISCV_SOC_H_
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#ifndef __RISCV32_LITEX_VEXRISCV_SOC_H_
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#define __RISCV32_LITEX_VEXRISCV_SOC_H_
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#define __RISCV32_LITEX_VEXRISCV_SOC_H_
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#include "../riscv-privilege/common/soc_common.h"
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#include "../riscv-privileged/common/soc_common.h"
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#include <zephyr/devicetree.h>
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#include <zephyr/devicetree.h>
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#include <zephyr/arch/common/sys_io.h>
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#include <zephyr/arch/common/sys_io.h>
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@ -13,7 +13,7 @@ config SOC_FAMILY_RISCV_PRIVILEGED
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config SOC_FAMILY
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config SOC_FAMILY
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string
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string
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default "riscv-privilege"
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default "riscv-privileged"
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depends on SOC_FAMILY_RISCV_PRIVILEGED
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depends on SOC_FAMILY_RISCV_PRIVILEGED
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config RISCV_HAS_PLIC
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config RISCV_HAS_PLIC
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@ -34,4 +34,4 @@ config RISCV_MTVEC_VECTORED_MODE
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help
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help
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Should the SOC use mtvec in vectored mode
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Should the SOC use mtvec in vectored mode
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source "soc/riscv/riscv-privilege/*/Kconfig.soc"
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source "soc/riscv/riscv-privileged/*/Kconfig.soc"
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@ -3,4 +3,4 @@
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# Copyright (c) 2017 Jean-Paul Etienne <fractalclone@gmail.com>
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# Copyright (c) 2017 Jean-Paul Etienne <fractalclone@gmail.com>
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# SPDX-License-Identifier: Apache-2.0
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# SPDX-License-Identifier: Apache-2.0
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source "soc/riscv/riscv-privilege/*/Kconfig.defconfig.series"
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source "soc/riscv/riscv-privileged/*/Kconfig.defconfig.series"
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@ -3,4 +3,4 @@
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# Copyright (c) 2017 Jean-Paul Etienne <fractalclone@gmail.com>
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# Copyright (c) 2017 Jean-Paul Etienne <fractalclone@gmail.com>
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# SPDX-License-Identifier: Apache-2.0
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# SPDX-License-Identifier: Apache-2.0
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source "soc/riscv/riscv-privilege/*/Kconfig.series"
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source "soc/riscv/riscv-privileged/*/Kconfig.series"
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@ -6,7 +6,7 @@ if SOC_SERIES_RISCV_ANDES_V5
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# Kconfig picks the first default with a satisfied condition.
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# Kconfig picks the first default with a satisfied condition.
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# SoC defaults should be parsed before SoC Series defaults, because SoCs usually
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# SoC defaults should be parsed before SoC Series defaults, because SoCs usually
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# overrides SoC Series values.
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# overrides SoC Series values.
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source "soc/riscv/riscv-privilege/andes_v5/Kconfig.defconfig.ae*"
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source "soc/riscv/riscv-privileged/andes_v5/Kconfig.defconfig.ae*"
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config SOC_SERIES
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config SOC_SERIES
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default "andes_v5"
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default "andes_v5"
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@ -3,7 +3,7 @@
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if SOC_SERIES_GD32VF103
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if SOC_SERIES_GD32VF103
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source "soc/riscv/riscv-privilege/gd32vf103/Kconfig.defconfig.gd32vf103*"
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source "soc/riscv/riscv-privileged/gd32vf103/Kconfig.defconfig.gd32vf103*"
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config SOC_SERIES
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config SOC_SERIES
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default "gd32vf103"
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default "gd32vf103"
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