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mcux: soc: rt1180 unmask reset event when rtwdog is using

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RT1180 takes reset event mask feature which should be unmasked when
watch dog is enabled.

Signed-off-by: Ruijia Wang <ruijia.wang@nxp.com>
This commit is contained in:
Ruijia Wang 2024-12-02 23:07:38 +08:00 • committed by Benjamin Cabé
commit 8c9b226900
1 changed files with 24 additions and 0 deletions
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24
soc/nxp/imxrt/imxrt118x/soc.c
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@ -17,6 +17,9 @@
#include <fsl_dcdc.h> #include <fsl_dcdc.h>
#include <fsl_ele_base_api.h> #include <fsl_ele_base_api.h>
#include <fsl_trdc.h> #include <fsl_trdc.h>
#if defined(CONFIG_WDT_MCUX_RTWDOG)
#include <fsl_soc_src.h>
#endif
#include <zephyr/dt-bindings/clock/imx_ccm_rev2.h> #include <zephyr/dt-bindings/clock/imx_ccm_rev2.h>
#include <cmsis_core.h> #include <cmsis_core.h>
@ -53,6 +56,14 @@ static const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN = {
}; };
#endif #endif
#if defined(CONFIG_WDT_MCUX_RTWDOG)
#define RTWDOG_IF_SET_SRC(n, i) \
if (IS_ENABLED(DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(rtwdog##n), nxp_rtwdog, okay))) { \
SRC_SetGlobalSystemResetMode(SRC_GENERAL_REG, kSRC_Wdog##i##Reset, \
kSRC_ResetSystem); \
}
#endif
const clock_sys_pll1_config_t sysPll1Config_BOARD_BootClockRUN = { const clock_sys_pll1_config_t sysPll1Config_BOARD_BootClockRUN = {
/* Enable Sys Pll1 divide-by-2 clock or not */ /* Enable Sys Pll1 divide-by-2 clock or not */
.pllDiv2En = 1, .pllDiv2En = 1,
@ -625,6 +636,19 @@ void soc_early_init_hook(void)
clock_init(); clock_init();
/* Get trdc and enable all access modes for MBC and MRC of TRDCA and TRDCW */ /* Get trdc and enable all access modes for MBC and MRC of TRDCA and TRDCW */
trdc_enable_all_access(); trdc_enable_all_access();
#if defined(CONFIG_WDT_MCUX_RTWDOG)
/* Unmask the watchdog reset channel */
RTWDOG_IF_SET_SRC(0, 1)
RTWDOG_IF_SET_SRC(1, 2)
RTWDOG_IF_SET_SRC(2, 3)
RTWDOG_IF_SET_SRC(3, 4)
RTWDOG_IF_SET_SRC(4, 5)
/* Clear the reset status otherwise TCM memory will reload in next reset */
uint32_t mask = SRC_GetResetStatusFlags(SRC_GENERAL_REG);
SRC_ClearGlobalSystemResetStatus(SRC_GENERAL_REG, mask);
#endif
/* Enable data cache */ /* Enable data cache */
sys_cache_data_enable(); sys_cache_data_enable();