mcux: soc: rt1180 unmask reset event when rtwdog is using
RT1180 takes reset event mask feature which should be unmasked when watch dog is enabled. Signed-off-by: Ruijia Wang <ruijia.wang@nxp.com>
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1 changed files with 24 additions and 0 deletions
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@ -17,6 +17,9 @@
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#include <fsl_dcdc.h>
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#include <fsl_ele_base_api.h>
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#include <fsl_trdc.h>
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#if defined(CONFIG_WDT_MCUX_RTWDOG)
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#include <fsl_soc_src.h>
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#endif
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#include <zephyr/dt-bindings/clock/imx_ccm_rev2.h>
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#include <cmsis_core.h>
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@ -53,6 +56,14 @@ static const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN = {
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};
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#endif
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#if defined(CONFIG_WDT_MCUX_RTWDOG)
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#define RTWDOG_IF_SET_SRC(n, i) \
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if (IS_ENABLED(DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(rtwdog##n), nxp_rtwdog, okay))) { \
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SRC_SetGlobalSystemResetMode(SRC_GENERAL_REG, kSRC_Wdog##i##Reset, \
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kSRC_ResetSystem); \
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}
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#endif
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const clock_sys_pll1_config_t sysPll1Config_BOARD_BootClockRUN = {
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/* Enable Sys Pll1 divide-by-2 clock or not */
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.pllDiv2En = 1,
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@ -625,6 +636,19 @@ void soc_early_init_hook(void)
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clock_init();
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/* Get trdc and enable all access modes for MBC and MRC of TRDCA and TRDCW */
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trdc_enable_all_access();
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#if defined(CONFIG_WDT_MCUX_RTWDOG)
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/* Unmask the watchdog reset channel */
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RTWDOG_IF_SET_SRC(0, 1)
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RTWDOG_IF_SET_SRC(1, 2)
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RTWDOG_IF_SET_SRC(2, 3)
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RTWDOG_IF_SET_SRC(3, 4)
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RTWDOG_IF_SET_SRC(4, 5)
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/* Clear the reset status otherwise TCM memory will reload in next reset */
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uint32_t mask = SRC_GetResetStatusFlags(SRC_GENERAL_REG);
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SRC_ClearGlobalSystemResetStatus(SRC_GENERAL_REG, mask);
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#endif
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/* Enable data cache */
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sys_cache_data_enable();
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