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drivers: eth: eth_sam_gmac: Split DMA queue flags

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This cleans up DMA flags by separating the necessary flags for devices
with one or multiple RX/TX queues.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This commit is contained in:
Gerson Fernando Budke 2020-02-26 00:14:11 -03:00 • committed by Jukka Rissanen
commit 8c2a1597db
2 changed files with 18 additions and 10 deletions
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12
drivers/ethernet/eth_sam_gmac.c
View file

@ -1194,15 +1194,11 @@ static int nonpriority_queue_init(Gmac *gmac, struct gmac_queue *queue)
/* Configure GMAC DMA transfer */ /* Configure GMAC DMA transfer */
gmac->GMAC_DCFGR = gmac->GMAC_DCFGR =
/* Receive Buffer Size (defined in multiples of 64 bytes) */ /* Receive Buffer Size (defined in multiples of 64 bytes) */
GMAC_DCFGR_DRBS(CONFIG_NET_BUF_DATA_SIZE >> 6) GMAC_DCFGR_DRBS(CONFIG_NET_BUF_DATA_SIZE >> 6) |
/* 4 kB Receiver Packet Buffer Memory Size */
| GMAC_DCFGR_RXBMS_FULL
/* 4 kB Transmitter Packet Buffer Memory Size */
| GMAC_DCFGR_TXPBMS
/* Transmitter Checksum Generation Offload Enable */
| GMAC_DCFGR_TXCOEN
/* Attempt to use INCR4 AHB bursts (Default) */ /* Attempt to use INCR4 AHB bursts (Default) */
| GMAC_DCFGR_FBLDO_INCR4; GMAC_DCFGR_FBLDO_INCR4 |
/* DMA Queue Flags */
GMAC_DMA_QUEUE_FLAGS;
/* Setup RX/TX completion and error interrupts */ /* Setup RX/TX completion and error interrupts */
gmac->GMAC_IER = GMAC_INT_EN_FLAGS; gmac->GMAC_IER = GMAC_INT_EN_FLAGS;

12
drivers/ethernet/eth_sam_gmac_priv.h
View file

@ -172,6 +172,18 @@ BUILD_ASSERT(ARRAY_SIZE(GMAC->GMAC_TBQBAPQ) + 1 == GMAC_QUEUE_NUM,
(GMAC_IERPQ_RCOMP | GMAC_INTPQ_RX_ERR_BITS | \ (GMAC_IERPQ_RCOMP | GMAC_INTPQ_RX_ERR_BITS | \
GMAC_IERPQ_TCOMP | GMAC_INTPQ_TX_ERR_BITS | GMAC_IERPQ_HRESP) GMAC_IERPQ_TCOMP | GMAC_INTPQ_TX_ERR_BITS | GMAC_IERPQ_HRESP)
/** GMAC Priority Queues DMA flags */
#if GMAC_PRIORITY_QUEUE_NUM >= 1
/* 4 kB Receiver Packet Buffer Memory Size */
/* 4 kB Transmitter Packet Buffer Memory Size */
/* Transmitter Checksum Generation Offload Enable */
#define GMAC_DMA_QUEUE_FLAGS \
(GMAC_DCFGR_RXBMS_FULL | GMAC_DCFGR_TXPBMS | \
GMAC_DCFGR_TXCOEN)
#else
#define GMAC_DMA_QUEUE_FLAGS (0)
#endif
/** List of GMAC queues */ /** List of GMAC queues */
enum queue_idx { enum queue_idx {
GMAC_QUE_0, /** Main queue */ GMAC_QUE_0, /** Main queue */