From 8c2a1597db68cc369141dde8b963d64c9f678ec0 Mon Sep 17 00:00:00 2001 From: Gerson Fernando Budke Date: Wed, 26 Feb 2020 00:14:11 -0300 Subject: [PATCH] drivers: eth: eth_sam_gmac: Split DMA queue flags This cleans up DMA flags by separating the necessary flags for devices with one or multiple RX/TX queues. Signed-off-by: Gerson Fernando Budke --- drivers/ethernet/eth_sam_gmac.c | 16 ++++++---------- drivers/ethernet/eth_sam_gmac_priv.h | 12 ++++++++++++ 2 files changed, 18 insertions(+), 10 deletions(-) diff --git a/drivers/ethernet/eth_sam_gmac.c b/drivers/ethernet/eth_sam_gmac.c index 5c112114df7..ec384680cdf 100644 --- a/drivers/ethernet/eth_sam_gmac.c +++ b/drivers/ethernet/eth_sam_gmac.c @@ -1193,16 +1193,12 @@ static int nonpriority_queue_init(Gmac *gmac, struct gmac_queue *queue) /* Configure GMAC DMA transfer */ gmac->GMAC_DCFGR = - /* Receive Buffer Size (defined in multiples of 64 bytes) */ - GMAC_DCFGR_DRBS(CONFIG_NET_BUF_DATA_SIZE >> 6) - /* 4 kB Receiver Packet Buffer Memory Size */ - | GMAC_DCFGR_RXBMS_FULL - /* 4 kB Transmitter Packet Buffer Memory Size */ - | GMAC_DCFGR_TXPBMS - /* Transmitter Checksum Generation Offload Enable */ - | GMAC_DCFGR_TXCOEN - /* Attempt to use INCR4 AHB bursts (Default) */ - | GMAC_DCFGR_FBLDO_INCR4; + /* Receive Buffer Size (defined in multiples of 64 bytes) */ + GMAC_DCFGR_DRBS(CONFIG_NET_BUF_DATA_SIZE >> 6) | + /* Attempt to use INCR4 AHB bursts (Default) */ + GMAC_DCFGR_FBLDO_INCR4 | + /* DMA Queue Flags */ + GMAC_DMA_QUEUE_FLAGS; /* Setup RX/TX completion and error interrupts */ gmac->GMAC_IER = GMAC_INT_EN_FLAGS; diff --git a/drivers/ethernet/eth_sam_gmac_priv.h b/drivers/ethernet/eth_sam_gmac_priv.h index 8e17a3c8ff8..7b8f143981a 100644 --- a/drivers/ethernet/eth_sam_gmac_priv.h +++ b/drivers/ethernet/eth_sam_gmac_priv.h @@ -172,6 +172,18 @@ BUILD_ASSERT(ARRAY_SIZE(GMAC->GMAC_TBQBAPQ) + 1 == GMAC_QUEUE_NUM, (GMAC_IERPQ_RCOMP | GMAC_INTPQ_RX_ERR_BITS | \ GMAC_IERPQ_TCOMP | GMAC_INTPQ_TX_ERR_BITS | GMAC_IERPQ_HRESP) +/** GMAC Priority Queues DMA flags */ +#if GMAC_PRIORITY_QUEUE_NUM >= 1 + /* 4 kB Receiver Packet Buffer Memory Size */ + /* 4 kB Transmitter Packet Buffer Memory Size */ + /* Transmitter Checksum Generation Offload Enable */ +#define GMAC_DMA_QUEUE_FLAGS \ + (GMAC_DCFGR_RXBMS_FULL | GMAC_DCFGR_TXPBMS | \ + GMAC_DCFGR_TXCOEN) +#else +#define GMAC_DMA_QUEUE_FLAGS (0) +#endif + /** List of GMAC queues */ enum queue_idx { GMAC_QUE_0, /** Main queue */