drivers: gpio_lpc11u6x: use pio nodes to configure pin mux for gpio

switch gpio driver to use pio nodes to configure pin control settings,
and stop using pinmux driver within gpio driver.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit is contained in:
Daniel DeGrasse 2022-04-12 15:16:44 -05:00 committed by David Leach
commit 81c209dc2d
3 changed files with 23 additions and 28 deletions

View file

@ -1,5 +1,6 @@
/* /*
* Copyright (c) 2020 Seagate Technology LLC * Copyright (c) 2020 Seagate Technology LLC
* Copyright 2022 NXP
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@ -17,9 +18,8 @@
#include <zephyr/drivers/clock_control.h> #include <zephyr/drivers/clock_control.h>
#include <zephyr/drivers/gpio.h> #include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/pinmux.h>
#include <zephyr/dt-bindings/pinctrl/lpc11u6x-pinctrl.h> #include <soc.h>
#include "gpio_utils.h" #include "gpio_utils.h"
@ -90,15 +90,14 @@ struct gpio_lpc11u6x_config {
/* gpio_driver_config needs to be first */ /* gpio_driver_config needs to be first */
struct gpio_driver_config common; struct gpio_driver_config common;
const struct gpio_lpc11u6x_shared *shared; const struct gpio_lpc11u6x_shared *shared;
char *pinmux_name;
uint8_t port_num; uint8_t port_num;
uint8_t ngpios; uint8_t ngpios;
volatile uint32_t *iocon_base;
}; };
struct gpio_lpc11u6x_data { struct gpio_lpc11u6x_data {
/* gpio_driver_data needs to be first. */ /* gpio_driver_data needs to be first. */
struct gpio_driver_data common; struct gpio_driver_data common;
const struct device *pinmux_dev;
sys_slist_t cb_list; sys_slist_t cb_list;
}; };
@ -106,12 +105,11 @@ static int gpio_lpc11u6x_pin_configure(const struct device *port,
gpio_pin_t pin, gpio_flags_t flags) gpio_pin_t pin, gpio_flags_t flags)
{ {
const struct gpio_lpc11u6x_config *config = port->config; const struct gpio_lpc11u6x_config *config = port->config;
struct gpio_lpc11u6x_data *data = port->data;
struct lpc11u6x_gpio_regs *gpio_regs = (struct lpc11u6x_gpio_regs *) struct lpc11u6x_gpio_regs *gpio_regs = (struct lpc11u6x_gpio_regs *)
(config->shared->gpio_base + LPC11U6X_GPIO_REGS); (config->shared->gpio_base + LPC11U6X_GPIO_REGS);
uint8_t port_num = config->port_num; uint8_t port_num = config->port_num;
uint32_t offset;
uint32_t func; uint32_t func;
int ret;
if (pin >= config->ngpios) { if (pin >= config->ngpios) {
return -EINVAL; return -EINVAL;
@ -141,23 +139,27 @@ static int gpio_lpc11u6x_pin_configure(const struct device *port,
if (flags & GPIO_SINGLE_ENDED) { if (flags & GPIO_SINGLE_ENDED) {
/* Open source mode is not supported. */ /* Open source mode is not supported. */
if (flags & GPIO_LINE_OPEN_DRAIN) if (flags & GPIO_LINE_OPEN_DRAIN)
func |= IOCON_OPENDRAIN_EN; func |= IOCON_PIO_OD(1);
else else
return -ENOTSUP; return -ENOTSUP;
} }
if (flags & GPIO_PULL_UP) { if (flags & GPIO_PULL_UP) {
func |= IOCON_MODE_PULLUP; func |= IOCON_PIO_MODE(0x2);
} else if (flags & GPIO_PULL_DOWN) { } else if (flags & GPIO_PULL_DOWN) {
func |= IOCON_MODE_PULLDOWN; func |= IOCON_PIO_MODE(0x1);
} else { } else {
func |= IOCON_MODE_INACT; func |= IOCON_PIO_MODE(0x0);
} }
ret = pinmux_pin_set(data->pinmux_dev, pin, func); /* Handle 4 bytes hole between PIO2_1 and PIO2_2. */
if (ret < 0) { if (port_num == 2 && pin > 1) {
return ret; offset = pin + 1;
} else {
offset = pin;
} }
/* iocon base + offset gives configuration register for this pin */
config->iocon_base[offset] = func;
/* Initial output value. */ /* Initial output value. */
if (flags & GPIO_OUTPUT_INIT_HIGH) { if (flags & GPIO_OUTPUT_INIT_HIGH) {
@ -511,17 +513,10 @@ do { \
static int gpio_lpc11u6x_init(const struct device *dev) static int gpio_lpc11u6x_init(const struct device *dev)
{ {
const struct gpio_lpc11u6x_config *config = dev->config; const struct gpio_lpc11u6x_config *config = dev->config;
struct gpio_lpc11u6x_data *data = dev->data;
const struct device *clock_dev; const struct device *clock_dev;
int ret; int ret;
static bool gpio_ready; static bool gpio_ready;
/* Retrieve pinmux device. */
data->pinmux_dev = device_get_binding(config->pinmux_name);
if (!data->pinmux_dev) {
return -EINVAL;
}
/* Initialize shared resources only once. */ /* Initialize shared resources only once. */
if (gpio_ready) { if (gpio_ready) {
return 0; return 0;
@ -576,9 +571,9 @@ static const struct gpio_lpc11u6x_config \
}, \ }, \
.shared = &gpio_lpc11u6x_shared, \ .shared = &gpio_lpc11u6x_shared, \
.port_num = id, \ .port_num = id, \
.pinmux_name = DT_LABEL(DT_PHANDLE(DT_NODELABEL(gpio##id), \
pinmux_port)), \
.ngpios = DT_PROP(DT_NODELABEL(gpio##id), ngpios), \ .ngpios = DT_PROP(DT_NODELABEL(gpio##id), ngpios), \
.iocon_base = (volatile uint32_t *)DT_REG_ADDR( \
DT_INST_PHANDLE(id, iocon)), \
}; \ }; \
\ \
static struct gpio_lpc11u6x_data gpio_lpc11u6x_data_##id; \ static struct gpio_lpc11u6x_data gpio_lpc11u6x_data_##id; \

View file

@ -118,7 +118,7 @@
ngpios = <24>; ngpios = <24>;
clocks = <&syscon LPC11U6X_CLOCK_GPIO>; clocks = <&syscon LPC11U6X_CLOCK_GPIO>;
pinmux-port = <&pinmux0>; iocon = <&pio0>;
status = "disabled"; status = "disabled";
}; };
@ -135,7 +135,7 @@
#gpio-cells = <2>; #gpio-cells = <2>;
clocks = <&syscon LPC11U6X_CLOCK_GPIO>; clocks = <&syscon LPC11U6X_CLOCK_GPIO>;
pinmux-port = <&pinmux1>; iocon = <&pio1>;
status = "disabled"; status = "disabled";
}; };
@ -154,7 +154,7 @@
ngpios = <22>; ngpios = <22>;
clocks = <&syscon LPC11U6X_CLOCK_GPIO>; clocks = <&syscon LPC11U6X_CLOCK_GPIO>;
pinmux-port = <&pinmux2>; iocon = <&pio2>;
status = "disabled"; status = "disabled";
}; };

View file

@ -29,12 +29,12 @@ properties:
clocks: clocks:
required: true required: true
pinmux-port: iocon:
required: true required: true
type: phandle type: phandle
description: | description: |
a phandle reference to the device tree node that contains the pinmux a phandle reference to the devicetree node that contains the pinmux
port associated with this GPIO controller. controller associated with the GPIO controller.
gpio-cells: gpio-cells:
- pin - pin