drivers: gpio_lpc11u6x: use pio nodes to configure pin mux for gpio
switch gpio driver to use pio nodes to configure pin control settings, and stop using pinmux driver within gpio driver. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit is contained in:
parent
ea9df42b25
commit
81c209dc2d
3 changed files with 23 additions and 28 deletions
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@ -1,5 +1,6 @@
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/*
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/*
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* Copyright (c) 2020 Seagate Technology LLC
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* Copyright (c) 2020 Seagate Technology LLC
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* Copyright 2022 NXP
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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* SPDX-License-Identifier: Apache-2.0
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*/
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*/
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@ -17,9 +18,8 @@
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#include <zephyr/drivers/clock_control.h>
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#include <zephyr/drivers/clock_control.h>
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/drivers/pinmux.h>
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#include <zephyr/dt-bindings/pinctrl/lpc11u6x-pinctrl.h>
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#include <soc.h>
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#include "gpio_utils.h"
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#include "gpio_utils.h"
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@ -90,15 +90,14 @@ struct gpio_lpc11u6x_config {
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/* gpio_driver_config needs to be first */
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/* gpio_driver_config needs to be first */
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struct gpio_driver_config common;
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struct gpio_driver_config common;
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const struct gpio_lpc11u6x_shared *shared;
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const struct gpio_lpc11u6x_shared *shared;
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char *pinmux_name;
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uint8_t port_num;
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uint8_t port_num;
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uint8_t ngpios;
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uint8_t ngpios;
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volatile uint32_t *iocon_base;
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};
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};
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struct gpio_lpc11u6x_data {
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struct gpio_lpc11u6x_data {
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/* gpio_driver_data needs to be first. */
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/* gpio_driver_data needs to be first. */
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struct gpio_driver_data common;
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struct gpio_driver_data common;
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const struct device *pinmux_dev;
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sys_slist_t cb_list;
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sys_slist_t cb_list;
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};
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};
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@ -106,12 +105,11 @@ static int gpio_lpc11u6x_pin_configure(const struct device *port,
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gpio_pin_t pin, gpio_flags_t flags)
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gpio_pin_t pin, gpio_flags_t flags)
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{
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{
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const struct gpio_lpc11u6x_config *config = port->config;
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const struct gpio_lpc11u6x_config *config = port->config;
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struct gpio_lpc11u6x_data *data = port->data;
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struct lpc11u6x_gpio_regs *gpio_regs = (struct lpc11u6x_gpio_regs *)
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struct lpc11u6x_gpio_regs *gpio_regs = (struct lpc11u6x_gpio_regs *)
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(config->shared->gpio_base + LPC11U6X_GPIO_REGS);
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(config->shared->gpio_base + LPC11U6X_GPIO_REGS);
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uint8_t port_num = config->port_num;
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uint8_t port_num = config->port_num;
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uint32_t offset;
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uint32_t func;
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uint32_t func;
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int ret;
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if (pin >= config->ngpios) {
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if (pin >= config->ngpios) {
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return -EINVAL;
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return -EINVAL;
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@ -141,23 +139,27 @@ static int gpio_lpc11u6x_pin_configure(const struct device *port,
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if (flags & GPIO_SINGLE_ENDED) {
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if (flags & GPIO_SINGLE_ENDED) {
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/* Open source mode is not supported. */
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/* Open source mode is not supported. */
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if (flags & GPIO_LINE_OPEN_DRAIN)
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if (flags & GPIO_LINE_OPEN_DRAIN)
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func |= IOCON_OPENDRAIN_EN;
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func |= IOCON_PIO_OD(1);
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else
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else
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return -ENOTSUP;
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return -ENOTSUP;
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}
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}
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if (flags & GPIO_PULL_UP) {
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if (flags & GPIO_PULL_UP) {
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func |= IOCON_MODE_PULLUP;
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func |= IOCON_PIO_MODE(0x2);
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} else if (flags & GPIO_PULL_DOWN) {
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} else if (flags & GPIO_PULL_DOWN) {
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func |= IOCON_MODE_PULLDOWN;
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func |= IOCON_PIO_MODE(0x1);
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} else {
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} else {
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func |= IOCON_MODE_INACT;
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func |= IOCON_PIO_MODE(0x0);
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}
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}
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ret = pinmux_pin_set(data->pinmux_dev, pin, func);
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/* Handle 4 bytes hole between PIO2_1 and PIO2_2. */
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if (ret < 0) {
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if (port_num == 2 && pin > 1) {
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return ret;
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offset = pin + 1;
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} else {
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offset = pin;
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}
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}
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/* iocon base + offset gives configuration register for this pin */
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config->iocon_base[offset] = func;
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/* Initial output value. */
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/* Initial output value. */
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if (flags & GPIO_OUTPUT_INIT_HIGH) {
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if (flags & GPIO_OUTPUT_INIT_HIGH) {
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@ -511,17 +513,10 @@ do { \
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static int gpio_lpc11u6x_init(const struct device *dev)
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static int gpio_lpc11u6x_init(const struct device *dev)
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{
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{
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const struct gpio_lpc11u6x_config *config = dev->config;
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const struct gpio_lpc11u6x_config *config = dev->config;
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struct gpio_lpc11u6x_data *data = dev->data;
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const struct device *clock_dev;
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const struct device *clock_dev;
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int ret;
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int ret;
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static bool gpio_ready;
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static bool gpio_ready;
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/* Retrieve pinmux device. */
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data->pinmux_dev = device_get_binding(config->pinmux_name);
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if (!data->pinmux_dev) {
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return -EINVAL;
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}
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/* Initialize shared resources only once. */
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/* Initialize shared resources only once. */
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if (gpio_ready) {
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if (gpio_ready) {
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return 0;
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return 0;
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@ -576,9 +571,9 @@ static const struct gpio_lpc11u6x_config \
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}, \
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}, \
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.shared = &gpio_lpc11u6x_shared, \
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.shared = &gpio_lpc11u6x_shared, \
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.port_num = id, \
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.port_num = id, \
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.pinmux_name = DT_LABEL(DT_PHANDLE(DT_NODELABEL(gpio##id), \
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pinmux_port)), \
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.ngpios = DT_PROP(DT_NODELABEL(gpio##id), ngpios), \
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.ngpios = DT_PROP(DT_NODELABEL(gpio##id), ngpios), \
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.iocon_base = (volatile uint32_t *)DT_REG_ADDR( \
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DT_INST_PHANDLE(id, iocon)), \
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}; \
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}; \
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\
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\
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static struct gpio_lpc11u6x_data gpio_lpc11u6x_data_##id; \
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static struct gpio_lpc11u6x_data gpio_lpc11u6x_data_##id; \
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@ -118,7 +118,7 @@
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ngpios = <24>;
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ngpios = <24>;
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clocks = <&syscon LPC11U6X_CLOCK_GPIO>;
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clocks = <&syscon LPC11U6X_CLOCK_GPIO>;
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pinmux-port = <&pinmux0>;
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iocon = <&pio0>;
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status = "disabled";
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status = "disabled";
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};
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};
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@ -135,7 +135,7 @@
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#gpio-cells = <2>;
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#gpio-cells = <2>;
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clocks = <&syscon LPC11U6X_CLOCK_GPIO>;
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clocks = <&syscon LPC11U6X_CLOCK_GPIO>;
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pinmux-port = <&pinmux1>;
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iocon = <&pio1>;
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status = "disabled";
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status = "disabled";
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};
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};
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@ -154,7 +154,7 @@
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ngpios = <22>;
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ngpios = <22>;
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clocks = <&syscon LPC11U6X_CLOCK_GPIO>;
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clocks = <&syscon LPC11U6X_CLOCK_GPIO>;
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pinmux-port = <&pinmux2>;
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iocon = <&pio2>;
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status = "disabled";
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status = "disabled";
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};
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};
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@ -29,12 +29,12 @@ properties:
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clocks:
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clocks:
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required: true
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required: true
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pinmux-port:
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iocon:
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required: true
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required: true
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type: phandle
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type: phandle
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description: |
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description: |
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a phandle reference to the device tree node that contains the pinmux
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a phandle reference to the devicetree node that contains the pinmux
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port associated with this GPIO controller.
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controller associated with the GPIO controller.
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gpio-cells:
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gpio-cells:
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- pin
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- pin
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