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tests: arch: arm: add test-suite for dynamic direct IRQs

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We add a test-suite for the newly introduced feature of
ARM Dynamic Direct Interrupts.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit is contained in:
Ioannis Glaropoulos 2019-12-18 17:14:00 +01:00 • committed by Andrew Boie
commit 80992d041a
4 changed files with 107 additions and 7 deletions
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21
tests/arch/arm/arm_irq_advanced_features/README.txt
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@ -1,8 +1,15 @@
Title: Test to verify the behavior of CONFIG_ZERO_LATENCY_IRQS at runtime (ARM Only)
Title: Test to verify advanced features of ARM Cortex-M interrupt handling.
Description:
This test suite verifies the behavior of CONFIG_ZERO_LATENCY_IRQS and
CONFIG_DYNAMIC_DIRECT_INTERRUPTS at runtime (ARM Only)
This test verifies the behavior of CONFIG_ZERO_LATENCY_IRQS at runtime.
The first test verifies the behavior of CONFIG_DYNAMIC_DIRECT_INTERRUPTS
at runtime. In particular, it tests that dynamic direct IRQs may be
installed at run-time in the software interrupt table.
Only for ARMv7-M and ARMv8-M Mainline targets.
The second test verifies the behavior of CONFIG_ZERO_LATENCY_IRQS at runtime.
In particular, it tests that IRQs configured with the IRQ_ZERO_LATENCY
flag are assigned the highest priority in the system (and, therefore,
cannot be masked-out by irq_lock()).
@ -34,12 +41,16 @@ or
Sample Output:
Running test suite zero_latency_irqs
*** Booting Zephyr OS build zephyr-v2.1.0-358-g9ac0a8c10a2e ***
Running test suite arm_irq_advanced_features
===================================================================
starting test - test_arm_dynamic_direct_interrupts
PASS - test_arm_dynamic_direct_interrupts
===================================================================
starting test - test_arm_zero_latency_irqs
Available IRQ line: 70
Available IRQ line: 57
PASS - test_arm_zero_latency_irqs
===================================================================
Test suite zero_latency_irqs succeeded
Test suite arm_irq_advanced_features succeeded
===================================================================
PROJECT EXECUTION SUCCESSFUL

1
tests/arch/arm/arm_irq_advanced_features/prj.conf
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@ -1,3 +1,4 @@
CONFIG_ZTEST=y
CONFIG_DYNAMIC_INTERRUPTS=y
CONFIG_DYNAMIC_DIRECT_INTERRUPTS=y
CONFIG_ZERO_LATENCY_IRQS=y

86
tests/arch/arm/arm_irq_advanced_features/src/arm_dynamic_direct_interrupts.c Normal file
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@ -0,0 +1,86 @@
/*
* Copyright (c) 2019 Nordic Semiconductor ASA.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <ztest.h>
#include <arch/cpu.h>
#include <arch/arm/cortex_m/cmsis.h>
/* Offset for the Direct interrupt used in this test. */
#define DIRECT_ISR_OFFSET (CONFIG_NUM_IRQS - 1)
static volatile int test_flag;
void arm_direct_isr_handler_0(void *args)
{
ARG_UNUSED(args);
test_flag = 1;
}
void arm_direct_isr_handler_1(void *args)
{
ARG_UNUSED(args);
test_flag = 2;
}
void test_arm_dynamic_direct_interrupts(void)
{
int post_flag = 0;
/* Place the dynamic interrupt dispatcher (with no rescheduling)
* in the ROM ISR table.
*/
ARM_IRQ_DIRECT_DYNAMIC_CONNECT(DIRECT_ISR_OFFSET, 0, 0, no_reschedule);
/* Attach the ISR handler at run time. */
irq_connect_dynamic(DIRECT_ISR_OFFSET, 0 /* highest priority */,
arm_direct_isr_handler_0,
NULL,
0);
/* Enable and pend the interrupt */
irq_enable(DIRECT_ISR_OFFSET);
NVIC_SetPendingIRQ(DIRECT_ISR_OFFSET);
/*
* Instruction barriers to make sure the NVIC IRQ is
* set to pending state before 'test_flag' is checked.
*/
__DSB();
__ISB();
/* Confirm test flag is set by the dynamic direct ISR handler. */
post_flag = test_flag;
zassert_true(post_flag == 1, "Test flag not set by ISR0\n");
post_flag = 0;
irq_disable(DIRECT_ISR_OFFSET);
/* Attach an alternative ISR handler at run-time. */
irq_connect_dynamic(DIRECT_ISR_OFFSET, 0 /* highest priority */,
arm_direct_isr_handler_1,
NULL,
0);
/* Enable and pend the interrupt */
irq_enable(DIRECT_ISR_OFFSET);
NVIC_SetPendingIRQ(DIRECT_ISR_OFFSET);
/*
* Instruction barriers to make sure the NVIC IRQ is
* set to pending state before 'test_flag' is checked.
*/
__DSB();
__ISB();
/* Confirm test flag is set by the dynamic direct ISR handler. */
post_flag = test_flag;
zassert_true(post_flag == 2, "Test flag not set by ISR1\n");
}
/**
* @}
*/

6
tests/arch/arm/arm_irq_advanced_features/src/main.c
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@ -7,10 +7,12 @@
#include <ztest.h>
extern void test_arm_zero_latency_irqs(void);
extern void test_arm_dynamic_direct_interrupts(void);
void test_main(void)
{
ztest_test_suite(zero_latency_irqs,
ztest_test_suite(arm_irq_advanced_features,
ztest_unit_test(test_arm_dynamic_direct_interrupts),
ztest_unit_test(test_arm_zero_latency_irqs));
ztest_run_test_suite(zero_latency_irqs);
ztest_run_test_suite(arm_irq_advanced_features);
}