From 80992d041adcbf9c60984c03208b20b9d3d43f08 Mon Sep 17 00:00:00 2001 From: Ioannis Glaropoulos Date: Wed, 18 Dec 2019 17:14:00 +0100 Subject: [PATCH] tests: arch: arm: add test-suite for dynamic direct IRQs We add a test-suite for the newly introduced feature of ARM Dynamic Direct Interrupts. Signed-off-by: Ioannis Glaropoulos --- .../arm/arm_irq_advanced_features/README.txt | 21 +++-- .../arm/arm_irq_advanced_features/prj.conf | 1 + .../src/arm_dynamic_direct_interrupts.c | 86 +++++++++++++++++++ .../arm/arm_irq_advanced_features/src/main.c | 6 +- 4 files changed, 107 insertions(+), 7 deletions(-) create mode 100644 tests/arch/arm/arm_irq_advanced_features/src/arm_dynamic_direct_interrupts.c diff --git a/tests/arch/arm/arm_irq_advanced_features/README.txt b/tests/arch/arm/arm_irq_advanced_features/README.txt index 2b7807024a1..a3377475b82 100644 --- a/tests/arch/arm/arm_irq_advanced_features/README.txt +++ b/tests/arch/arm/arm_irq_advanced_features/README.txt @@ -1,8 +1,15 @@ -Title: Test to verify the behavior of CONFIG_ZERO_LATENCY_IRQS at runtime (ARM Only) +Title: Test to verify advanced features of ARM Cortex-M interrupt handling. Description: +This test suite verifies the behavior of CONFIG_ZERO_LATENCY_IRQS and +CONFIG_DYNAMIC_DIRECT_INTERRUPTS at runtime (ARM Only) -This test verifies the behavior of CONFIG_ZERO_LATENCY_IRQS at runtime. +The first test verifies the behavior of CONFIG_DYNAMIC_DIRECT_INTERRUPTS +at runtime. In particular, it tests that dynamic direct IRQs may be +installed at run-time in the software interrupt table. +Only for ARMv7-M and ARMv8-M Mainline targets. + +The second test verifies the behavior of CONFIG_ZERO_LATENCY_IRQS at runtime. In particular, it tests that IRQs configured with the IRQ_ZERO_LATENCY flag are assigned the highest priority in the system (and, therefore, cannot be masked-out by irq_lock()). @@ -34,12 +41,16 @@ or Sample Output: -Running test suite zero_latency_irqs +*** Booting Zephyr OS build zephyr-v2.1.0-358-g9ac0a8c10a2e *** +Running test suite arm_irq_advanced_features +=================================================================== +starting test - test_arm_dynamic_direct_interrupts +PASS - test_arm_dynamic_direct_interrupts =================================================================== starting test - test_arm_zero_latency_irqs -Available IRQ line: 70 +Available IRQ line: 57 PASS - test_arm_zero_latency_irqs =================================================================== -Test suite zero_latency_irqs succeeded +Test suite arm_irq_advanced_features succeeded =================================================================== PROJECT EXECUTION SUCCESSFUL diff --git a/tests/arch/arm/arm_irq_advanced_features/prj.conf b/tests/arch/arm/arm_irq_advanced_features/prj.conf index cb585d8f1bc..c5c24cf5873 100644 --- a/tests/arch/arm/arm_irq_advanced_features/prj.conf +++ b/tests/arch/arm/arm_irq_advanced_features/prj.conf @@ -1,3 +1,4 @@ CONFIG_ZTEST=y CONFIG_DYNAMIC_INTERRUPTS=y +CONFIG_DYNAMIC_DIRECT_INTERRUPTS=y CONFIG_ZERO_LATENCY_IRQS=y diff --git a/tests/arch/arm/arm_irq_advanced_features/src/arm_dynamic_direct_interrupts.c b/tests/arch/arm/arm_irq_advanced_features/src/arm_dynamic_direct_interrupts.c new file mode 100644 index 00000000000..8a07a4fcf8c --- /dev/null +++ b/tests/arch/arm/arm_irq_advanced_features/src/arm_dynamic_direct_interrupts.c @@ -0,0 +1,86 @@ +/* + * Copyright (c) 2019 Nordic Semiconductor ASA. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +/* Offset for the Direct interrupt used in this test. */ +#define DIRECT_ISR_OFFSET (CONFIG_NUM_IRQS - 1) + +static volatile int test_flag; + +void arm_direct_isr_handler_0(void *args) +{ + ARG_UNUSED(args); + + test_flag = 1; +} + +void arm_direct_isr_handler_1(void *args) +{ + ARG_UNUSED(args); + + test_flag = 2; +} + +void test_arm_dynamic_direct_interrupts(void) +{ + int post_flag = 0; + + /* Place the dynamic interrupt dispatcher (with no rescheduling) + * in the ROM ISR table. + */ + ARM_IRQ_DIRECT_DYNAMIC_CONNECT(DIRECT_ISR_OFFSET, 0, 0, no_reschedule); + + /* Attach the ISR handler at run time. */ + irq_connect_dynamic(DIRECT_ISR_OFFSET, 0 /* highest priority */, + arm_direct_isr_handler_0, + NULL, + 0); + + /* Enable and pend the interrupt */ + irq_enable(DIRECT_ISR_OFFSET); + NVIC_SetPendingIRQ(DIRECT_ISR_OFFSET); + + /* + * Instruction barriers to make sure the NVIC IRQ is + * set to pending state before 'test_flag' is checked. + */ + __DSB(); + __ISB(); + + /* Confirm test flag is set by the dynamic direct ISR handler. */ + post_flag = test_flag; + zassert_true(post_flag == 1, "Test flag not set by ISR0\n"); + + post_flag = 0; + irq_disable(DIRECT_ISR_OFFSET); + + /* Attach an alternative ISR handler at run-time. */ + irq_connect_dynamic(DIRECT_ISR_OFFSET, 0 /* highest priority */, + arm_direct_isr_handler_1, + NULL, + 0); + + /* Enable and pend the interrupt */ + irq_enable(DIRECT_ISR_OFFSET); + NVIC_SetPendingIRQ(DIRECT_ISR_OFFSET); + + /* + * Instruction barriers to make sure the NVIC IRQ is + * set to pending state before 'test_flag' is checked. + */ + __DSB(); + __ISB(); + + /* Confirm test flag is set by the dynamic direct ISR handler. */ + post_flag = test_flag; + zassert_true(post_flag == 2, "Test flag not set by ISR1\n"); +} +/** + * @} + */ diff --git a/tests/arch/arm/arm_irq_advanced_features/src/main.c b/tests/arch/arm/arm_irq_advanced_features/src/main.c index 05b2a7046de..4f39660f605 100644 --- a/tests/arch/arm/arm_irq_advanced_features/src/main.c +++ b/tests/arch/arm/arm_irq_advanced_features/src/main.c @@ -7,10 +7,12 @@ #include extern void test_arm_zero_latency_irqs(void); +extern void test_arm_dynamic_direct_interrupts(void); void test_main(void) { - ztest_test_suite(zero_latency_irqs, + ztest_test_suite(arm_irq_advanced_features, + ztest_unit_test(test_arm_dynamic_direct_interrupts), ztest_unit_test(test_arm_zero_latency_irqs)); - ztest_run_test_suite(zero_latency_irqs); + ztest_run_test_suite(arm_irq_advanced_features); }