From 7e80c74f95693027dc86a5f5d3bf11aa14baeea3 Mon Sep 17 00:00:00 2001 From: TOKITA Hiroshi Date: Sat, 4 Dec 2021 23:56:48 +0000 Subject: [PATCH] drivers: serial: Add USART support for GD32V Modifying configuration to enable with gd32vf103 - Add usart definition to devicetree. - Define USART_STAT as alias of USART_STAT0 if not defined it. - Enable USART if SOC_SERIES_RISCV_GIGADEVICE_GD32VF103. Signed-off-by: TOKITA Hiroshi --- .../longan_nano/longan_nano-pinctrl.dtsi | 14 +++++++++ boards/riscv/longan_nano/longan_nano.dts | 10 +++++++ .../riscv/longan_nano/longan_nano_defconfig | 8 +++++ boards/riscv/longan_nano/longan_nano_lite.dts | 10 +++++++ .../longan_nano/longan_nano_lite_defconfig | 8 +++++ drivers/serial/Kconfig.gd32 | 2 +- dts/riscv/gigadevice/gd32vf103.dtsi | 30 +++++++++++++++++++ 7 files changed, 81 insertions(+), 1 deletion(-) create mode 100644 boards/riscv/longan_nano/longan_nano-pinctrl.dtsi diff --git a/boards/riscv/longan_nano/longan_nano-pinctrl.dtsi b/boards/riscv/longan_nano/longan_nano-pinctrl.dtsi new file mode 100644 index 00000000000..ff327094a73 --- /dev/null +++ b/boards/riscv/longan_nano/longan_nano-pinctrl.dtsi @@ -0,0 +1,14 @@ +/* + * Copyright (c) 2021, TOKITA Hiroshi + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +&pinctrl { + usart0_default: usart0_default { + group1 { + pinmux = , ; + }; + }; +}; diff --git a/boards/riscv/longan_nano/longan_nano.dts b/boards/riscv/longan_nano/longan_nano.dts index d0f4997d61e..5c9ad09c29b 100644 --- a/boards/riscv/longan_nano/longan_nano.dts +++ b/boards/riscv/longan_nano/longan_nano.dts @@ -6,13 +6,23 @@ /dts-v1/; #include +#include "longan_nano-pinctrl.dtsi" / { model = "Sipeed Longan Nano"; compatible = "sipeed,longan_nano"; chosen { + zephyr,console = &usart0; + zephyr,shell-uart = &usart0; zephyr,sram = &sram0; zephyr,flash = &flash0; }; }; + +&usart0 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&usart0_default>; + pinctrl-names = "default"; +}; diff --git a/boards/riscv/longan_nano/longan_nano_defconfig b/boards/riscv/longan_nano/longan_nano_defconfig index b08b78cbc89..53367e55928 100644 --- a/boards/riscv/longan_nano/longan_nano_defconfig +++ b/boards/riscv/longan_nano/longan_nano_defconfig @@ -11,3 +11,11 @@ CONFIG_GD32_HXTAL_8MHZ=y # enable machine timer CONFIG_RISCV_MACHINE_TIMER=y + +# enable uart driver +CONFIG_SERIAL=y +CONFIG_UART_INTERRUPT_DRIVEN=y + +# enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y diff --git a/boards/riscv/longan_nano/longan_nano_lite.dts b/boards/riscv/longan_nano/longan_nano_lite.dts index 4c1fafebdf9..02fed25ffc9 100644 --- a/boards/riscv/longan_nano/longan_nano_lite.dts +++ b/boards/riscv/longan_nano/longan_nano_lite.dts @@ -6,13 +6,23 @@ /dts-v1/; #include +#include "longan_nano-pinctrl.dtsi" / { model = "Sipeed Longan Nano Lite"; compatible = "sipeed,longan_nano_lite"; chosen { + zephyr,console = &usart0; + zephyr,shell-uart = &usart0; zephyr,sram = &sram0; zephyr,flash = &flash0; }; }; + +&usart0 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&usart0_default>; + pinctrl-names = "default"; +}; diff --git a/boards/riscv/longan_nano/longan_nano_lite_defconfig b/boards/riscv/longan_nano/longan_nano_lite_defconfig index ec56283e85f..3ff72bc7b3c 100644 --- a/boards/riscv/longan_nano/longan_nano_lite_defconfig +++ b/boards/riscv/longan_nano/longan_nano_lite_defconfig @@ -11,3 +11,11 @@ CONFIG_GD32_HXTAL_8MHZ=y # enable machine timer CONFIG_RISCV_MACHINE_TIMER=y + +# enable uart driver +CONFIG_SERIAL=y +CONFIG_UART_INTERRUPT_DRIVEN=y + +# enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y diff --git a/drivers/serial/Kconfig.gd32 b/drivers/serial/Kconfig.gd32 index 56b823ce0eb..85b22a7fc38 100644 --- a/drivers/serial/Kconfig.gd32 +++ b/drivers/serial/Kconfig.gd32 @@ -7,7 +7,7 @@ DT_COMPAT_GIGADEVICE_GD32_USART := gd,gd32-usart config USART_GD32 bool "GD32 serial driver" default $(dt_compat_enabled,$(DT_COMPAT_GIGADEVICE_GD32_USART)) - depends on SOC_FAMILY_GD32 + depends on (SOC_FAMILY_GD32 || SOC_SERIES_GD32VF103) select SERIAL_HAS_DRIVER select SERIAL_SUPPORT_INTERRUPT select USE_GD32_USART diff --git a/dts/riscv/gigadevice/gd32vf103.dtsi b/dts/riscv/gigadevice/gd32vf103.dtsi index a4eb806b0bb..f9280a16bdd 100644 --- a/dts/riscv/gigadevice/gd32vf103.dtsi +++ b/dts/riscv/gigadevice/gd32vf103.dtsi @@ -65,6 +65,36 @@ }; }; + usart0: serial@40013800 { + compatible = "gd,gd32-usart"; + reg = <0x40013800 0x400>; + interrupts = <56 0>; + interrupt-parent = <&eclic>; + rcu-periph-clock = <0x60e>; + status = "disabled"; + label = "UART_0"; + }; + + usart1: serial@40004400 { + compatible = "gd,gd32-usart"; + reg = <0x40004400 0x400>; + interrupts = <57 0>; + interrupt-parent = <&eclic>; + rcu-periph-clock = <0x711>; + status = "disabled"; + label = "UART_1"; + }; + + usart2: serial@40004800 { + compatible = "gd,gd32-usart"; + reg = <0x40004800 0x400>; + interrupts = <58 0>; + interrupt-parent = <&eclic>; + rcu-periph-clock = <0x712>; + status = "disabled"; + label = "UART_2"; + }; + afio: afio@40010000 { compatible = "gd,gd32-afio"; reg = <0x40010000 0x400>;