drivers: pinctrl: Add support for RZ/V2L
This is the initial commit to support pinctrl driver for Renesas RZ/V2L Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com> Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com> Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
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7 changed files with 378 additions and 2 deletions
102
soc/renesas/rz/common/pinctrl_rzv.h
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102
soc/renesas/rz/common/pinctrl_rzv.h
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/*
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* Copyright (c) 2025 Renesas Electronics Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_SOC_RENESAS_RZ_COMMON_PINCTRL_RZV_H_
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#define ZEPHYR_SOC_RENESAS_RZ_COMMON_PINCTRL_RZV_H_
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#include <zephyr/devicetree.h>
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#include <zephyr/sys/util.h>
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#include <zephyr/types.h>
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#include "r_ioport.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Porting */
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typedef struct pinctrl_cfg_data_t {
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uint32_t reserved: 4;
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uint32_t pupd_reg: 6;
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uint32_t iolh_reg: 6;
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uint32_t pmc_reg: 1;
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uint32_t sr_reg: 1;
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uint32_t ien_reg: 1;
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uint32_t filonoff_reg: 1;
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uint32_t filnum_reg: 2;
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uint32_t filclksel_reg: 2;
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uint32_t pfc_reg: 3;
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} pinctrl_cfg_data_t;
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typedef struct pinctrl_soc_pin_t {
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bsp_io_port_pin_t port_pin;
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pinctrl_cfg_data_t config;
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} pinctrl_soc_pin_t;
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/* Iterate over each pinctrl-n phandle child */
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#define Z_PINCTRL_STATE_PIN_INIT(node_id, state_prop, idx) \
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DT_FOREACH_CHILD(DT_PHANDLE_BY_IDX(node_id, state_prop, idx), \
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Z_PINCTRL_STATE_PIN_CHILD_INIT)
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/* Iterate over each pinctrl-n phandle child */
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#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \
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{DT_FOREACH_PROP_ELEM_SEP(node_id, prop, Z_PINCTRL_STATE_PIN_INIT, ())};
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#define Z_PINCTRL_STATE_PIN_CHILD_INIT(node_id) \
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COND_CODE_1(DT_NODE_HAS_PROP(node_id, pinmux), \
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(DT_FOREACH_PROP_ELEM(node_id, pinmux, Z_PINCTRL_PINMUX_INIT)), \
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()) \
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COND_CODE_1(DT_NODE_HAS_PROP(node_id, pins), \
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(DT_FOREACH_PROP_ELEM(node_id, pins, Z_PINCTRL_SPECIAL_PINS_INIT)), \
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())
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#define RZV_GET_PORT_PIN(pinmux) (pinmux & ~(0xF << 4))
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#define RZV_GET_FUNC(pinmux) ((pinmux & 0xF0) >> 4)
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#define RZV_GET_PU_PD(node_id) \
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DT_PROP(node_id, bias_pull_up) == 1 ? 1U : (DT_PROP(node_id, bias_pull_down) == 1 ? 2U : 0U)
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#define RZV_GET_FILNUM(node_id) ((DT_PROP(node_id, renesas_filter) >> 2) & 0x3)
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#define RZV_GET_FILCLKSEL(node_id) (DT_PROP(node_id, renesas_filter) & 0x3)
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#define RZV_FILTER_ON_OFF(node_id) COND_CODE_0(DT_PROP(node_id, renesas_filter), (0), (1))
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/* Process pinmux cfg */
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#define Z_PINCTRL_PINMUX_INIT(node_id, state_prop, idx) \
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{ \
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.port_pin = RZV_GET_PORT_PIN(DT_PROP_BY_IDX(node_id, state_prop, idx)), \
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.config = {.reserved = 0, \
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.pupd_reg = RZV_GET_PU_PD(node_id), \
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.iolh_reg = DT_PROP(node_id, drive_strength), \
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.pmc_reg = 1, \
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.sr_reg = DT_ENUM_IDX(node_id, slew_rate), \
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.ien_reg = DT_PROP(node_id, input_enable), \
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.filonoff_reg = RZV_FILTER_ON_OFF(node_id), \
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.filnum_reg = RZV_GET_FILNUM(node_id), \
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.filclksel_reg = RZV_GET_FILCLKSEL(node_id), \
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.pfc_reg = RZV_GET_FUNC(DT_PROP_BY_IDX(node_id, state_prop, idx))}, \
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},
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#define Z_PINCTRL_SPECIAL_PINS_INIT(node_id, state_prop, idx) \
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{ \
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.port_pin = DT_PROP_BY_IDX(node_id, state_prop, idx), \
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.config = \
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{ \
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.reserved = 0, \
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.pupd_reg = RZV_GET_PU_PD(node_id), \
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.iolh_reg = DT_PROP(node_id, drive_strength), \
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.pmc_reg = 0, \
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.sr_reg = DT_ENUM_IDX(node_id, slew_rate), \
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.ien_reg = DT_PROP(node_id, input_enable), \
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.filonoff_reg = RZV_FILTER_ON_OFF(node_id), \
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.filnum_reg = RZV_GET_FILNUM(node_id), \
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.filclksel_reg = RZV_GET_FILCLKSEL(node_id), \
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.pfc_reg = 0, \
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}, \
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},
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#ifdef __cplusplus
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}
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#endif
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#endif /* ZEPHYR_SOC_RENESAS_RZ_COMMON_PINCTRL_RZV_H_ */
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11
soc/renesas/rz/rzv2l/pinctrl_soc.h
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11
soc/renesas/rz/rzv2l/pinctrl_soc.h
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/*
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* Copyright (c) 2025 Renesas Electronics Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_SOC_RENESAS_RZ_RZV2L_PINCTRL_SOC_H_
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#define ZEPHYR_SOC_RENESAS_RZ_RZV2L_PINCTRL_SOC_H_
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#include <pinctrl_rzv.h>
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#endif /* ZEPHYR_SOC_RENESAS_RZ_RZV2L_PINCTRL_SOC_H_ */
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