michaelh/zephyr
1
0
Fork 0
Code Releases Activity

arch: riscv: added support for custom initialization of gp register

Browse source 
Plus added implementation for esp32c3 SoC.

Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
This commit is contained in:
Felipe Neves 2021-06-14 11:10:47 -03:00 • committed by Anas Nashif
commit 7b09d031fa
4 changed files with 18 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

2
soc/riscv/esp32c3/soc.h
View file

@ -41,6 +41,8 @@ extern STATUS esp32c3_rom_uart_tx_one_char(uint8_t chr);
extern STATUS esp32c3_rom_uart_rx_one_char(uint8_t *chr);
extern void esp32c3_rom_ets_set_user_start(uint32_t start);
ulong_t __soc_get_gp_initial_value(void);
#endif /* _ASMLANGUAGE */
#endif /* __SOC_H__ */