From 77f65b907f2de29fdc7ed155d737db19d3e2d525 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 11 Apr 2017 10:05:42 -0500 Subject: [PATCH] arm: dts: Add DTS support for NRF52832 SoC Add plumbing to build system and SoC level dtsi for the NRF52832 SoC. We additionally add the necessary yaml files for the UART on the NRF52 SoCs. Change-Id: I3b4a821b2993827e33d8e84bdbbc759d1521f8bd Signed-off-by: Kumar Gala --- .../nrf52/Kconfig.defconfig.nrf52832_QFAA | 2 ++ .../nrf52/Kconfig.defconfig.series | 2 ++ drivers/serial/Kconfig.nrf5 | 2 ++ dts/arm/nordic/mem.h | 31 +++++++++++++++++++ dts/arm/nordic/nrf52832.dtsi | 31 +++++++++++++++++++ dts/arm/yaml/nordic,nrf-uart.yaml | 30 ++++++++++++++++++ dts/arm/yaml/nordic,nrf-uarte.yaml | 30 ++++++++++++++++++ 7 files changed, 128 insertions(+) create mode 100644 dts/arm/nordic/mem.h create mode 100644 dts/arm/nordic/nrf52832.dtsi create mode 100644 dts/arm/yaml/nordic,nrf-uart.yaml create mode 100644 dts/arm/yaml/nordic,nrf-uarte.yaml diff --git a/arch/arm/soc/nordic_nrf5/nrf52/Kconfig.defconfig.nrf52832_QFAA b/arch/arm/soc/nordic_nrf5/nrf52/Kconfig.defconfig.nrf52832_QFAA index 3fe65841cd8..73a2b69d39c 100644 --- a/arch/arm/soc/nordic_nrf5/nrf52/Kconfig.defconfig.nrf52832_QFAA +++ b/arch/arm/soc/nordic_nrf5/nrf52/Kconfig.defconfig.nrf52832_QFAA @@ -12,11 +12,13 @@ config SOC string default nRF52832_QFAA +if !HAS_DTS config SRAM_SIZE default 64 config FLASH_SIZE default 512 +endif config NUM_IRQS int diff --git a/arch/arm/soc/nordic_nrf5/nrf52/Kconfig.defconfig.series b/arch/arm/soc/nordic_nrf5/nrf52/Kconfig.defconfig.series index e92bef8960d..acbcf7c60e0 100644 --- a/arch/arm/soc/nordic_nrf5/nrf52/Kconfig.defconfig.series +++ b/arch/arm/soc/nordic_nrf5/nrf52/Kconfig.defconfig.series @@ -19,6 +19,7 @@ config SYS_CLOCK_HW_CYCLES_PER_SEC config SYS_POWER_MANAGEMENT default y +if !HAS_DTS config SRAM_BASE_ADDRESS default 0x20000000 @@ -28,5 +29,6 @@ config FLASH_BASE_ADDRESS config NUM_IRQ_PRIO_BITS int default 3 +endif endif # SOC_SERIES_NRF52X diff --git a/drivers/serial/Kconfig.nrf5 b/drivers/serial/Kconfig.nrf5 index 464349be792..04e49df3cfb 100644 --- a/drivers/serial/Kconfig.nrf5 +++ b/drivers/serial/Kconfig.nrf5 @@ -24,6 +24,7 @@ config UART_NRF5_NAME This is the device name for UART, and is included in the device struct. +if !HAS_DTS config UART_NRF5_IRQ_PRI int "UART Interrupt Priority (Interrupt support)" range 0 1 if SOC_SERIES_NRF51X @@ -41,6 +42,7 @@ config UART_NRF5_BAUD_RATE depends on UART_NRF5 help The baud rate for UART port to be set to at boot. +endif config UART_NRF5_CLK_FREQ int diff --git a/dts/arm/nordic/mem.h b/dts/arm/nordic/mem.h new file mode 100644 index 00000000000..5a3895629fb --- /dev/null +++ b/dts/arm/nordic/mem.h @@ -0,0 +1,31 @@ +#ifndef __DT_BINDING_ST_MEM_H +#define __DT_BINDING_ST_MEM_H + +#define __SIZE_K(x) (x * 1024) + +#if defined(CONFIG_SOC_NRF51822_QFAA) +#define DT_FLASH_SIZE __SIZE_K(256) +#define DT_SRAM_SIZE __SIZE_K(16) +#elif defined(CONFIG_SOC_NRF51822_QFAB) +#define DT_FLASH_SIZE __SIZE_K(128) +#define DT_SRAM_SIZE __SIZE_K(16) +#elif defined(CONFIG_SOC_NRF51822_QFAC) +#define DT_FLASH_SIZE __SIZE_K(256) +#define DT_SRAM_SIZE __SIZE_K(32) +#elif defined(CONFIG_SOC_NRF52832_QFAA) +#define DT_FLASH_SIZE __SIZE_K(512) +#define DT_SRAM_SIZE __SIZE_K(64) +#elif defined(CONFIG_SOC_NRF52832_CIAA) +#define DT_FLASH_SIZE __SIZE_K(512) +#define DT_SRAM_SIZE __SIZE_K(64) +#elif defined(CONFIG_SOC_NRF52832_QFAB) +#define DT_FLASH_SIZE __SIZE_K(256) +#define DT_SRAM_SIZE __SIZE_K(32) +#elif defined(CONFIG_SOC_NRF52840_QIAA) +#define DT_FLASH_SIZE __SIZE_K(1024) +#define DT_SRAM_SIZE __SIZE_K(256) +#else +#error "Flash and RAM sizes not defined for this chip" +#endif + +#endif /* __DT_BINDING_ST_MEM_H */ diff --git a/dts/arm/nordic/nrf52832.dtsi b/dts/arm/nordic/nrf52832.dtsi new file mode 100644 index 00000000000..d7658884d59 --- /dev/null +++ b/dts/arm/nordic/nrf52832.dtsi @@ -0,0 +1,31 @@ +#include +#include + +/ { + cpus { + cpu@0 { + compatible = "arm,cortex-m4f"; + }; + }; + + flash0: flash { + reg = <0x00000000 DT_FLASH_SIZE>; + }; + + sram0: memory { + reg = <0x20000000 DT_SRAM_SIZE>; + }; + + soc { + uart0: uart@40002000 { + compatible = "nordic,nrf-uarte", "nordic,nrf-uart"; + reg = <0x40002000 0x1000>; + interrupts = <2 1>; + status = "disabled"; + }; + }; +}; + +&nvic { + arm,num-irq-priority-bits = <3>; +}; diff --git a/dts/arm/yaml/nordic,nrf-uart.yaml b/dts/arm/yaml/nordic,nrf-uart.yaml new file mode 100644 index 00000000000..0784d0f6043 --- /dev/null +++ b/dts/arm/yaml/nordic,nrf-uart.yaml @@ -0,0 +1,30 @@ +--- +title: Nordic UART +id: nordic,nrf-uart +version: 0.1 + +description: > + This binding gives a base representation of the Nordic UART + +inherits: + - !include uart.yaml + +properties: + - compatible: + type: string + category: required + description: compatible strings + constraint: "nordic,nrf-uart" + + - reg: + type: array + description: mmio register space + generation: define + category: required + + - interrupts: + type: array + category: required + description: required interrupts + generation: define +... diff --git a/dts/arm/yaml/nordic,nrf-uarte.yaml b/dts/arm/yaml/nordic,nrf-uarte.yaml new file mode 100644 index 00000000000..b7f8789ac29 --- /dev/null +++ b/dts/arm/yaml/nordic,nrf-uarte.yaml @@ -0,0 +1,30 @@ +--- +title: Nordic UARTE +id: nordic,nrf-uarte +version: 0.1 + +description: > + This binding gives a base representation of the Nordic UARTE + +inherits: + - !include uart.yaml + +properties: + - compatible: + type: string + category: required + description: compatible strings + constraint: "nordic,nrf-uarte" + + - reg: + type: array + description: mmio register space + generation: define + category: required + + - interrupts: + type: array + category: required + description: required interrupts + generation: define +...