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arm: cmsis: Convert _Scb*FaultAddrGet to use direct CMSIS register access

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Coverted:
	_ScbBusFaultAddrGet
	_ScbMemFaultAddrGet

To use direct CMSIS register access

Jira: ZEP-1568

Change-Id: Ic49b3ac3fc4fb63d413f273569c77f6539e4e572
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2017-01-27 20:36:51 -06:00 • committed by Maureen Helm
commit 737207f052
2 changed files with 4 additions and 32 deletions
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10
arch/arm/core/fault.c
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@ -77,13 +77,13 @@ void _FaultDump(const NANO_ESF *esf, int fault)
__scs.scb.cfsr.byte.ufsr.val);
if (SCB->CFSR & CFSR_MMARVALID_Msk) {
PR_EXC("MMFAR: 0x%" PRIx32 "\n", _ScbMemFaultAddrGet());
PR_EXC("MMFAR: 0x%" PRIx32 "\n", SCB->MMFAR);
if (escalation) {
_ScbMemFaultMmfarReset();
}
}
if (SCB->CFSR & CFSR_BFARVALID_Msk) {
PR_EXC("BFAR: 0x%" PRIx32 "\n", _ScbBusFaultAddrGet());
PR_EXC("BFAR: 0x%" PRIx32 "\n", SCB->BFAR);
if (escalation) {
_ScbBusFaultBfarReset();
}
@ -137,8 +137,7 @@ static void _MpuFault(const NANO_ESF *esf, int fromHardFault)
} else if (SCB->CFSR & CFSR_DACCVIOL_Msk) {
PR_EXC(" Data Access Violation\n");
if (SCB->CFSR & CFSR_MMARVALID_Msk) {
PR_EXC(" Address: 0x%" PRIx32 "\n",
_ScbMemFaultAddrGet());
PR_EXC(" Address: 0x%" PRIx32 "\n", SCB->MMFAR);
if (fromHardFault) {
_ScbMemFaultMmfarReset();
}
@ -169,8 +168,7 @@ static void _BusFault(const NANO_ESF *esf, int fromHardFault)
} else if (SCB->CFSR & CFSR_PRECISERR_Msk) {
PR_EXC(" Precise data bus error\n");
if (SCB->CFSR & CFSR_BFARVALID_Msk) {
PR_EXC(" Address: 0x%" PRIx32 "\n",
_ScbBusFaultAddrGet());
PR_EXC(" Address: 0x%" PRIx32 "\n", SCB->BFAR);
if (fromHardFault) {
_ScbBusFaultBfarReset();
}