From 737207f052ae6d48a9b2566d4c040e86e38615f6 Mon Sep 17 00:00:00 2001
From: Kumar Gala <kumar.gala@linaro.org>
Date: Fri, 27 Jan 2017 20:36:51 -0600
Subject: [PATCH] arm: cmsis: Convert _Scb*FaultAddrGet to use direct CMSIS
 register access

Coverted:
	_ScbBusFaultAddrGet
	_ScbMemFaultAddrGet

To use direct CMSIS register access

Jira: ZEP-1568

Change-Id: Ic49b3ac3fc4fb63d413f273569c77f6539e4e572
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
---
 arch/arm/core/fault.c           | 10 ++++------
 include/arch/arm/cortex_m/scb.h | 26 --------------------------
 2 files changed, 4 insertions(+), 32 deletions(-)

diff --git a/arch/arm/core/fault.c b/arch/arm/core/fault.c
index 1c92ba60d4d..624f28fc49b 100644
--- a/arch/arm/core/fault.c
+++ b/arch/arm/core/fault.c
@@ -77,13 +77,13 @@ void _FaultDump(const NANO_ESF *esf, int fault)
 	       __scs.scb.cfsr.byte.ufsr.val);
 
 	if (SCB->CFSR & CFSR_MMARVALID_Msk) {
-		PR_EXC("MMFAR: 0x%" PRIx32 "\n", _ScbMemFaultAddrGet());
+		PR_EXC("MMFAR: 0x%" PRIx32 "\n", SCB->MMFAR);
 		if (escalation) {
 			_ScbMemFaultMmfarReset();
 		}
 	}
 	if (SCB->CFSR & CFSR_BFARVALID_Msk) {
-		PR_EXC("BFAR: 0x%" PRIx32 "\n", _ScbBusFaultAddrGet());
+		PR_EXC("BFAR: 0x%" PRIx32 "\n", SCB->BFAR);
 		if (escalation) {
 			_ScbBusFaultBfarReset();
 		}
@@ -137,8 +137,7 @@ static void _MpuFault(const NANO_ESF *esf, int fromHardFault)
 	} else if (SCB->CFSR & CFSR_DACCVIOL_Msk) {
 		PR_EXC("  Data Access Violation\n");
 		if (SCB->CFSR & CFSR_MMARVALID_Msk) {
-			PR_EXC("  Address: 0x%" PRIx32 "\n",
-			       _ScbMemFaultAddrGet());
+			PR_EXC("  Address: 0x%" PRIx32 "\n", SCB->MMFAR);
 			if (fromHardFault) {
 				_ScbMemFaultMmfarReset();
 			}
@@ -169,8 +168,7 @@ static void _BusFault(const NANO_ESF *esf, int fromHardFault)
 	} else if (SCB->CFSR & CFSR_PRECISERR_Msk) {
 		PR_EXC("  Precise data bus error\n");
 		if (SCB->CFSR & CFSR_BFARVALID_Msk) {
-			PR_EXC("  Address: 0x%" PRIx32 "\n",
-			       _ScbBusFaultAddrGet());
+			PR_EXC("  Address: 0x%" PRIx32 "\n", SCB->BFAR);
 			if (fromHardFault) {
 				_ScbBusFaultBfarReset();
 			}
diff --git a/include/arch/arm/cortex_m/scb.h b/include/arch/arm/cortex_m/scb.h
index de7f1f36bf8..05c28e9ce68 100644
--- a/include/arch/arm/cortex_m/scb.h
+++ b/include/arch/arm/cortex_m/scb.h
@@ -89,18 +89,6 @@ static inline void _ScbMemFaultAllFaultsReset(void)
 	__scs.scb.cfsr.byte.mmfsr.val = 0xfe;
 }
 
-/**
- *
- * @brief Find out the faulting address on an MPU fault
- *
- * @return the faulting address
- */
-
-static inline uint32_t _ScbMemFaultAddrGet(void)
-{
-	return __scs.scb.mmfar;
-}
-
 /**
  *
  * @brief Invalid the value in BFAR
@@ -130,20 +118,6 @@ static inline void _ScbBusFaultAllFaultsReset(void)
 	__scs.scb.cfsr.byte.bfsr.val = 0xfe;
 }
 
-/**
- *
- * @brief Get the faulting address on a precise bus fault
- *
- * This routine returns the faulting address for a precise bus fault.
- *
- * @return the faulting address
- */
-
-static inline uint32_t _ScbBusFaultAddrGet(void)
-{
-	return __scs.scb.bfar;
-}
-
 /**
  *
  * @brief Clear all usage faults (UFSR register)