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board: iotdk: bug fixes and remove unsupported drivers config

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* i2c, spi, gpio are not tested, remove them now.
* fix the license issue in openocd.cfg
* fix the shell related setting

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
This commit is contained in:
Wayne Ren 2018-12-12 23:33:11 +08:00 • committed by Anas Nashif
commit 6b5dea578e
5 changed files with 2 additions and 109 deletions
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1
boards/arc/iotdk/iotdk.dts
View file

@ -21,6 +21,7 @@
zephyr,sram = &dccm0;
zephyr,flash = &flash0;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
};
};

4
boards/arc/iotdk/iotdk.yaml
View file

@ -6,10 +6,6 @@ toolchain:
- zephyr
- xtools
ram: 128
supported:
- i2c
- spi
- gpio
testing:
ignore_tags:
- net

12
boards/arc/iotdk/support/openocd.cfg
View file

@ -1,18 +1,6 @@
# Copyright (C) 2018 Synopsys, Inc.
# SPDX-License-Identifier: Apache-2.0
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License along
# with this program. If not, see <http://www.gnu.org/licenses/>.
#
# Synopsys DesignWare ARC IoT Development Kit

93
soc/arc/snps_arc_iot/Kconfig.defconfig
View file

@ -46,97 +46,4 @@ config UART_NS16550_PORT_0
endif # UART_CONSOLE
if GPIO
config GPIO_QMSI_SS
def_bool y
if GPIO_QMSI_SS
config GPIO_QMSI_SS_0
def_bool y
config GPIO_QMSI_SS_1
def_bool y
endif # GPIO_QMSI_SS
endif # GPIO
if I2C
config I2C_QMSI_SS
def_bool y
if I2C_QMSI_SS
config I2C_SS_0
def_bool y
config I2C_SS_1
def_bool y
config I2C_SS_SDA_SETUP
default 2
config I2C_SS_SDA_HOLD
default 10
endif
endif # I2C
if SPI
config SPI_DW
def_bool y
if SPI_DW
config SPI_DW_FIFO_DEPTH
default 7
config CLOCK_CONTROL
def_bool y
config CLOCK_CONTROL_QUARK_SE
def_bool y
config CLOCK_CONTROL_QUARK_SE_SENSOR
def_bool y
config SPI_0
def_bool y
config SPI_DW_PORT_0_INTERRUPT_SINGLE_LINE
def_bool n
config SPI_DW_PORT_0_CLOCK_GATE
def_bool y
config SPI_DW_PORT_0_CLOCK_GATE_DRV_NAME
default CLOCK_CONTROL_QUARK_SE_SENSOR_DRV_NAME
config SPI_DW_PORT_0_CLOCK_GATE_SUBSYS
default 3
config SPI_1
def_bool y
config SPI_DW_PORT_1_INTERRUPT_SINGLE_LINE
def_bool n
config SPI_DW_PORT_1_CLOCK_GATE
def_bool y
config SPI_DW_PORT_1_CLOCK_GATE_DRV_NAME
default CLOCK_CONTROL_QUARK_SE_SENSOR_DRV_NAME
config SPI_DW_PORT_1_CLOCK_GATE_SUBSYS
default 4
endif # SPI_DW
endif # SPI
endif #ARC_IOT

1
soc/arc/snps_arc_iot/linker.ld
View file

@ -9,6 +9,7 @@
*/
#include <generated_dts_board.h>
#include <autoconf.h>
/*
* SRAM base address and size