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soc: arm: qemu_cortex_a53: Use the refactored AArch64 interrupt system

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This commit updates the `qemu_cortex_a53` platform to use the
refactored AArch64 interrupt system.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit is contained in:
Stephanos Ioannidis 2020-02-11 18:12:30 +09:00 • committed by Ioannis Glaropoulos
commit 685bf54829
3 changed files with 0 additions and 14 deletions
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9
soc/arm/qemu_cortex_a53/Kconfig.defconfig
View file

@ -11,15 +11,6 @@ config NUM_IRQS
# - include the UART interrupts # - include the UART interrupts
default 220 default 220
config 2ND_LVL_ISR_TBL_OFFSET
default 1
config MAX_IRQ_PER_AGGREGATOR
default 219
config NUM_2ND_LEVEL_AGGREGATORS
default 1
config SYS_CLOCK_HW_CYCLES_PER_SEC config SYS_CLOCK_HW_CYCLES_PER_SEC
default 62500000 default 62500000

2
soc/arm/qemu_cortex_a53/Kconfig.soc
View file

@ -6,5 +6,3 @@ config SOC_QEMU_CORTEX_A53
select ARM select ARM
select CPU_CORTEX_A53 select CPU_CORTEX_A53
select GIC_V2 select GIC_V2
select MULTI_LEVEL_INTERRUPTS
select 2ND_LEVEL_INTERRUPTS

3
soc/arm/qemu_cortex_a53/dts_fixup.h
View file

@ -5,6 +5,3 @@
*/ */
#define DT_INST_0_SHARED_IRQ_IRQ_0_SENSE DT_INST_0_SHARED_IRQ_IRQ_0_FLAGS #define DT_INST_0_SHARED_IRQ_IRQ_0_SENSE DT_INST_0_SHARED_IRQ_IRQ_0_FLAGS
#undef DT_INST_0_SHARED_IRQ_IRQ_0
#define DT_INST_0_SHARED_IRQ_IRQ_0 ((DT_SHARED_IRQ_SHAREDIRQ0_IRQ_0 + 1) << 8)