From 685bf54829c9eb7a3a9b0667a4e0d1e9ddd27cfa Mon Sep 17 00:00:00 2001 From: Stephanos Ioannidis Date: Tue, 11 Feb 2020 18:12:30 +0900 Subject: [PATCH] soc: arm: qemu_cortex_a53: Use the refactored AArch64 interrupt system This commit updates the `qemu_cortex_a53` platform to use the refactored AArch64 interrupt system. Signed-off-by: Stephanos Ioannidis --- soc/arm/qemu_cortex_a53/Kconfig.defconfig | 9 --------- soc/arm/qemu_cortex_a53/Kconfig.soc | 2 -- soc/arm/qemu_cortex_a53/dts_fixup.h | 3 --- 3 files changed, 14 deletions(-) diff --git a/soc/arm/qemu_cortex_a53/Kconfig.defconfig b/soc/arm/qemu_cortex_a53/Kconfig.defconfig index d9990fa6c19..3c5ce0822c8 100644 --- a/soc/arm/qemu_cortex_a53/Kconfig.defconfig +++ b/soc/arm/qemu_cortex_a53/Kconfig.defconfig @@ -11,15 +11,6 @@ config NUM_IRQS # - include the UART interrupts default 220 -config 2ND_LVL_ISR_TBL_OFFSET - default 1 - -config MAX_IRQ_PER_AGGREGATOR - default 219 - -config NUM_2ND_LEVEL_AGGREGATORS - default 1 - config SYS_CLOCK_HW_CYCLES_PER_SEC default 62500000 diff --git a/soc/arm/qemu_cortex_a53/Kconfig.soc b/soc/arm/qemu_cortex_a53/Kconfig.soc index b69baec261c..0a0305cc495 100644 --- a/soc/arm/qemu_cortex_a53/Kconfig.soc +++ b/soc/arm/qemu_cortex_a53/Kconfig.soc @@ -6,5 +6,3 @@ config SOC_QEMU_CORTEX_A53 select ARM select CPU_CORTEX_A53 select GIC_V2 - select MULTI_LEVEL_INTERRUPTS - select 2ND_LEVEL_INTERRUPTS diff --git a/soc/arm/qemu_cortex_a53/dts_fixup.h b/soc/arm/qemu_cortex_a53/dts_fixup.h index 390c8a1455e..e65598a797f 100644 --- a/soc/arm/qemu_cortex_a53/dts_fixup.h +++ b/soc/arm/qemu_cortex_a53/dts_fixup.h @@ -5,6 +5,3 @@ */ #define DT_INST_0_SHARED_IRQ_IRQ_0_SENSE DT_INST_0_SHARED_IRQ_IRQ_0_FLAGS - -#undef DT_INST_0_SHARED_IRQ_IRQ_0 -#define DT_INST_0_SHARED_IRQ_IRQ_0 ((DT_SHARED_IRQ_SHAREDIRQ0_IRQ_0 + 1) << 8)