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soc: nxp: s32k3: configure missing mpu regions

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This fixes a regression introduced in c31640239c where all regions
except Flash and RAM where left unmapped. Before introducing region
0 that prevents speculative access to the entire memory space, we
were relying on the architectural background map to access them.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
This commit is contained in:
Manuel Argüelles 2025-05-30 19:50:19 +07:00 • committed by Anas Nashif
commit 6681f8d342
2 changed files with 22 additions and 2 deletions
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5
dts/arm/nxp/nxp_s32k344_m7.dtsi
View file

@ -1,5 +1,5 @@
/* /*
* Copyright 2023-2024 NXP * Copyright 2023-2025 NXP
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@ -8,6 +8,7 @@
#include <mem.h> #include <mem.h>
#include <zephyr/dt-bindings/clock/nxp_s32k344_clock.h> #include <zephyr/dt-bindings/clock/nxp_s32k344_clock.h>
#include <zephyr/dt-bindings/i2c/i2c.h> #include <zephyr/dt-bindings/i2c/i2c.h>
#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
/ { / {
cpus { cpus {
@ -45,12 +46,14 @@
compatible = "zephyr,memory-region", "arm,itcm"; compatible = "zephyr,memory-region", "arm,itcm";
reg = <0x00000000 DT_SIZE_K(64)>; reg = <0x00000000 DT_SIZE_K(64)>;
zephyr,memory-region = "ITCM"; zephyr,memory-region = "ITCM";
zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_FLASH) )>;
}; };
dtcm: memory@20000000 { dtcm: memory@20000000 {
compatible = "zephyr,memory-region", "arm,dtcm"; compatible = "zephyr,memory-region", "arm,dtcm";
reg = <0x20000000 DT_SIZE_K(128)>; reg = <0x20000000 DT_SIZE_K(128)>;
zephyr,memory-region = "DTCM"; zephyr,memory-region = "DTCM";
zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
}; };
sram0_1: sram0_1@20400000 { sram0_1: sram0_1@20400000 {

19
soc/nxp/s32/s32k3/mpu_regions.c
View file

@ -12,11 +12,16 @@
extern char _rom_attr[]; extern char _rom_attr[];
#endif #endif
#define REGION_PERIPHERAL_BASE_ADDRESS 0x40000000
#define REGION_PERIPHERAL_SIZE REGION_512M
#define REGION_PPB_BASE_ADDRESS 0xE0000000
#define REGION_PPB_SIZE REGION_1M
static struct arm_mpu_region mpu_regions[] = { static struct arm_mpu_region mpu_regions[] = {
/* ERR011573: use first region to prevent speculative access in entire memory space */ /* ERR011573: use first region to prevent speculative access in entire memory space */
{ {
.name = "BACKGROUND", .name = "UNMAPPED",
.base = 0, .base = 0,
.attr = {REGION_4G | MPU_RASR_XN_Msk | P_NA_U_NA_Msk}, .attr = {REGION_4G | MPU_RASR_XN_Msk | P_NA_U_NA_Msk},
}, },
@ -42,6 +47,18 @@ static struct arm_mpu_region mpu_regions[] = {
.attr = {(uint32_t)_rom_attr}, .attr = {(uint32_t)_rom_attr},
}, },
#endif #endif
{
.name = "PERIPHERALS",
.base = REGION_PERIPHERAL_BASE_ADDRESS,
.attr = REGION_IO_ATTR(REGION_PERIPHERAL_SIZE),
},
{
.name = "PPB",
.base = REGION_PPB_BASE_ADDRESS,
.attr = REGION_PPB_ATTR(REGION_PPB_SIZE),
},
}; };
const struct arm_mpu_config mpu_config = { const struct arm_mpu_config mpu_config = {