arm float: Add preemptive FP regs
Adds the preemptive floating point registers to the ARM's thread control structure. Change-Id: I65fbee6303091ce0658bbc442c4707d306b68e92 Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
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d5709b6c92
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65f1c0c10a
2 changed files with 36 additions and 3 deletions
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@ -51,6 +51,10 @@ GEN_OFFSET_SYM(tTCS, basepri);
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GEN_OFFSET_SYM(tTCS, custom_data);
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#endif
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#ifdef CONFIG_FLOAT
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GEN_OFFSET_SYM(tTCS, preemp_float_regs);
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#endif
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/* ARM-specific ESF structure member offsets */
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GEN_OFFSET_SYM(tESF, a1);
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@ -57,9 +57,8 @@ struct __thread_entry {
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struct coop {
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/*
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* Unused for Cortex-M, which automatically saves the neccesary
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*registers
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* in its exception stack frame.
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* Unused for Cortex-M, which automatically saves the necessary
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* registers in its exception stack frame.
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*
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* For Cortex-A, this may be:
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*
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@ -119,6 +118,28 @@ typedef struct preempt tPreempt;
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#endif
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#ifndef _ASMLANGUAGE
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#ifdef CONFIG_FLOAT
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struct preemp_float {
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float s16;
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float s17;
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float s18;
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float s19;
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float s20;
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float s21;
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float s22;
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float s23;
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float s24;
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float s25;
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float s26;
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float s27;
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float s28;
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float s29;
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float s30;
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float s31;
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};
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#endif
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struct tcs {
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struct tcs *link; /* singly-linked list in _nanokernel.fibers */
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uint32_t flags;
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@ -142,6 +163,14 @@ struct tcs {
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#ifdef CONFIG_MICROKERNEL
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void *uk_task_ptr;
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#endif
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#ifdef CONFIG_FLOAT
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/*
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* No cooperative floating point register set structure exists for
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* the Cortex-M as it automatically saves the necessary registers
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* in its exception stack frame.
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*/
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struct preemp_float preemp_float_regs;
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#endif
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};
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struct s_NANO {
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