diff --git a/arch/arm/core/offsets/offsets.c b/arch/arm/core/offsets/offsets.c
index ee869f3d324..6cc38e92edf 100644
--- a/arch/arm/core/offsets/offsets.c
+++ b/arch/arm/core/offsets/offsets.c
@@ -51,6 +51,10 @@ GEN_OFFSET_SYM(tTCS, basepri);
 GEN_OFFSET_SYM(tTCS, custom_data);
 #endif
 
+#ifdef CONFIG_FLOAT
+GEN_OFFSET_SYM(tTCS, preemp_float_regs);
+#endif
+
 /* ARM-specific ESF structure member offsets */
 
 GEN_OFFSET_SYM(tESF, a1);
diff --git a/arch/arm/include/nano_private.h b/arch/arm/include/nano_private.h
index ae5c2b69a0b..5d8ddc64e7f 100644
--- a/arch/arm/include/nano_private.h
+++ b/arch/arm/include/nano_private.h
@@ -57,9 +57,8 @@ struct __thread_entry {
 
 struct coop {
 	/*
-	 * Unused for Cortex-M, which automatically saves the neccesary
-	 *registers
-	 * in its exception stack frame.
+	 * Unused for Cortex-M, which automatically saves the necessary
+	 * registers in its exception stack frame.
 	 *
 	 * For Cortex-A, this may be:
 	 *
@@ -119,6 +118,28 @@ typedef struct preempt tPreempt;
 #endif
 
 #ifndef _ASMLANGUAGE
+
+#ifdef CONFIG_FLOAT
+struct preemp_float {
+	float  s16;
+	float  s17;
+	float  s18;
+	float  s19;
+	float  s20;
+	float  s21;
+	float  s22;
+	float  s23;
+	float  s24;
+	float  s25;
+	float  s26;
+	float  s27;
+	float  s28;
+	float  s29;
+	float  s30;
+	float  s31;
+};
+#endif
+
 struct tcs {
 	struct tcs *link; /* singly-linked list in _nanokernel.fibers */
 	uint32_t flags;
@@ -142,6 +163,14 @@ struct tcs {
 #ifdef CONFIG_MICROKERNEL
 	void *uk_task_ptr;
 #endif
+#ifdef CONFIG_FLOAT
+	/*
+	 * No cooperative floating point register set structure exists for
+	 * the Cortex-M as it automatically saves the necessary registers
+	 * in its exception stack frame.
+	 */
+	struct preemp_float  preemp_float_regs;
+#endif
 };
 
 struct s_NANO {