arch: arm: cortex_m: use cmsis API rather than assembly

Asm is notoriously harder to maintain than C and requires core specific
adaptation which impairs even more the readability of the code.

Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>
This commit is contained in:
Wilfried Chauveau 2023-10-08 00:27:41 +01:00 committed by Carles Cufí
commit 65ec07fe33

View file

@ -10,6 +10,7 @@
#include <zephyr/kernel.h> #include <zephyr/kernel.h>
#include <zephyr/irq_offload.h> #include <zephyr/irq_offload.h>
#include <cmsis_core.h>
volatile irq_offload_routine_t offload_routine; volatile irq_offload_routine_t offload_routine;
static const void *offload_param; static const void *offload_param;
@ -22,14 +23,11 @@ void z_irq_do_offload(void)
void arch_irq_offload(irq_offload_routine_t routine, const void *parameter) void arch_irq_offload(irq_offload_routine_t routine, const void *parameter)
{ {
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE) && defined(CONFIG_ASSERT) #if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE) && !defined(CONFIG_ARMV8_M_BASELINE) \
/* ARMv6-M/ARMv8-M Baseline HardFault if you make a SVC call with && defined(CONFIG_ASSERT)
* interrupts locked. /* ARMv6-M HardFault if you make a SVC call with interrupts locked.
*/ */
unsigned int key; __ASSERT(__get_PRIMASK() == 0U, "irq_offload called with interrupts locked\n");
__asm__ volatile("mrs %0, PRIMASK;" : "=r" (key) : : "memory");
__ASSERT(key == 0U, "irq_offload called with interrupts locked\n");
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE && CONFIG_ASSERT */ #endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE && CONFIG_ASSERT */
k_sched_lock(); k_sched_lock();