kinetis: fix Kconfig indentation

Help text in Kconfig files should be indented with <tab><space><space>.

Change-Id: Iefa5c8f4bfe329b4ee754ebfe43766f445432184
Signed-off-by: Bogdan Davidoaia <bogdan.davidoaia@linaro.org>
This commit is contained in:
Bogdan Davidoaia 2017-03-01 10:58:34 +02:00 committed by Kumar Gala
commit 65a029cb05
5 changed files with 46 additions and 46 deletions

View file

@ -23,39 +23,39 @@ config SOC_PART_NUMBER
default SOC_PART_NUMBER_KINETIS_K6X if SOC_SERIES_KINETIS_K6X
default SOC_PART_NUMBER_KINETIS_KWX if SOC_SERIES_KINETIS_KWX
help
This string holds the full part number of the SoC. It is a hidden option
that you should not set directly. The part number selection choice defines
the default value for this string.
This string holds the full part number of the SoC. It is a hidden option
that you should not set directly. The part number selection choice defines
the default value for this string.
config HAS_OSC
bool
default n
help
Set if the oscillator (OSC) module is present in the SoC.
Set if the oscillator (OSC) module is present in the SoC.
config HAS_MCG
bool
default n
help
Set if the multipurpose clock generator (MCG) module is present in the SoC.
Set if the multipurpose clock generator (MCG) module is present in the SoC.
config HAS_RNGA
bool
default n
help
Set if the random number generator accelerator (RNGA) module is present in the SoC.
Set if the random number generator accelerator (RNGA) module is present in the SoC.
config HAS_TRNG
bool
default n
help
Set if the true random number generator (TRNG) module is present in the SoC.
Set if the true random number generator (TRNG) module is present in the SoC.
config HAS_LPUART
bool
default n
help
Set if the low power uart (LPUART) module is present in the SoC.
Set if the low power uart (LPUART) module is present in the SoC.
if HAS_OSC
@ -66,25 +66,25 @@ choice
config OSC_EXTERNAL
bool "External reference clock"
help
Set this option to use the oscillator in external reference clock mode.
Set this option to use the oscillator in external reference clock mode.
config OSC_LOW_POWER
bool "Low power oscillator"
help
Set this option to use the oscillator in low-power mode.
Set this option to use the oscillator in low-power mode.
config OSC_HIGH_GAIN
bool "High gain oscillator"
help
Set this option to use the oscillator in high-gain mode.
Set this option to use the oscillator in high-gain mode.
endchoice
config OSC_XTAL0_FREQ
int "External oscillator frequency"
help
Set the external oscillator frequency in Hz. This should be set by the
board's defconfig.
Set the external oscillator frequency in Hz. This should be set by the
board's defconfig.
endif # HAS_OSC
@ -95,33 +95,33 @@ config MCG_PRDIV0
range 0 0x18
default 0
help
Selects the amount to divide down the external reference clock for the PLL.
The resulting frequency must be in the range of 2 MHz to 4 MHz.
Selects the amount to divide down the external reference clock for the PLL.
The resulting frequency must be in the range of 2 MHz to 4 MHz.
config MCG_VDIV0
hex "VCO 0 divider"
range 0 0x1F
default 0
help
Selects the amount to divide the VCO output of the PLL. The VDIV 0 bits
establish the multiplication factor (M) applied to the reference clock
frequency.
Selects the amount to divide the VCO output of the PLL. The VDIV 0 bits
establish the multiplication factor (M) applied to the reference clock
frequency.
config MCG_FCRDIV
int "Fast internal reference clock divider"
range 0 7
default 1
help
Selects the amount to divide down the fast internal reference clock. The
resulting frequency must be in the range 31.25 kHz to 4 MHz.
Selects the amount to divide down the fast internal reference clock. The
resulting frequency must be in the range 31.25 kHz to 4 MHz.
config MCG_FRDIV
int "FLL external reference divider"
range 0 7
default 0
help
Selects the amount to divide down the external reference clock for the
FLL. The resulting frequency must be in the range 31.25 kHz to 39.0625
kHz.
Selects the amount to divide down the external reference clock for the
FLL. The resulting frequency must be in the range 31.25 kHz to 39.0625
kHz.
endif # HAS_MCG

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@ -13,4 +13,4 @@ config SOC_SERIES_KINETIS_K6X
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select CPU_HAS_SYSTICK
help
Enable support for Kinetis K6x MCU series
Enable support for Kinetis K6x MCU series

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@ -60,58 +60,58 @@ config SOC_PART_NUMBER_KINETIS_K6X
default "MK64FX512VLQ12" if SOC_PART_NUMBER_MK64FX512VLQ12
default "MK64FX512VMD12" if SOC_PART_NUMBER_MK64FX512VMD12
help
This string holds the full part number of the SoC. It is a hidden option
that you should not set directly. The part number selection choice defines
the default value for this string.
This string holds the full part number of the SoC. It is a hidden option
that you should not set directly. The part number selection choice defines
the default value for this string.
config K64_CORE_CLOCK_DIVIDER
int
prompt "Freescale K64 core clock divider"
default 1
help
This option specifies the divide value for the K64 processor core clock
from the system clock.
This option specifies the divide value for the K64 processor core clock
from the system clock.
config K64_BUS_CLOCK_DIVIDER
int
prompt "Freescale K64 bus clock divider"
default 2
help
This option specifies the divide value for the K64 bus clock from the
system clock.
This option specifies the divide value for the K64 bus clock from the
system clock.
config K64_FLEXBUS_CLOCK_DIVIDER
int
prompt "Freescale K64 FlexBus clock divider"
default 3
help
This option specifies the divide value for the K64 FlexBus clock from the
system clock.
This option specifies the divide value for the K64 FlexBus clock from the
system clock.
config K64_FLASH_CLOCK_DIVIDER
int
prompt "Freescale K64 flash clock divider"
default 5
help
This option specifies the divide value for the K64 flash clock from the
system clock.
This option specifies the divide value for the K64 flash clock from the
system clock.
config WDOG_INIT
def_bool y
# omit prompt to signify a "hidden" option
help
This processor enables the watchdog timer with a short timeout
upon reset. Therefore, this requires that the watchdog be configured
during reset handling.
This processor enables the watchdog timer with a short timeout
upon reset. Therefore, this requires that the watchdog be configured
during reset handling.
config PRESERVE_JTAG_IO_PINS
bool "Kinetis K6x JTAG pin usage"
depends on PINMUX
default y
help
The FRDM-K64F board routes the PTA0/1/2 pins as JTAG/SWD signals that
are used for the OpenSDAv2 debug interface. These pins are also routed to
the Arduino header as D8, D3 and D5, respectively.
Enable this option to preserve these pins for the debug interface.
The FRDM-K64F board routes the PTA0/1/2 pins as JTAG/SWD signals that
are used for the OpenSDAv2 debug interface. These pins are also routed to
the Arduino header as D8, D3 and D5, respectively.
Enable this option to preserve these pins for the debug interface.
endif # SOC_SERIES_KINETIS_K6X

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@ -12,4 +12,4 @@ config SOC_SERIES_KINETIS_KWX
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select CPU_HAS_SYSTICK
help
Enable support for Kinetis KWx MCU series
Enable support for Kinetis KWx MCU series

View file

@ -33,8 +33,8 @@ config SOC_PART_NUMBER_KINETIS_KWX
default "MKW41Z256VHT4" if SOC_PART_NUMBER_MKW41Z256VHT4
default "MKW41Z512VHT4" if SOC_PART_NUMBER_MKW41Z512VHT4
help
This string holds the full part number of the SoC. It is a hidden option
that you should not set directly. The part number selection choice defines
the default value for this string.
This string holds the full part number of the SoC. It is a hidden option
that you should not set directly. The part number selection choice defines
the default value for this string.
endif # SOC_SERIES_KINETIS_KWX