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soc: st: stm32: stm32n6: set 256 SMH buffer alignment for LTDC

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Set the LTDC buffer alignment to 256 in order to avoid an
issue when accessing to PSRAM via XSPI.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
This commit is contained in:
Alain Volmat 2025-06-17 12:29:08 +02:00 • committed by Benjamin Cabé
commit 6274df7a0b
1 changed files with 4 additions and 0 deletions
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4
soc/st/stm32/stm32n6x/Kconfig.defconfig
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@ -14,4 +14,8 @@ DT_STM32_CPU_CLOCK_FREQ := $(dt_node_int_prop_int,$(DT_STM32_CPU_CLOCK_PATH),clo
config SYS_CLOCK_HW_CYCLES_PER_SEC config SYS_CLOCK_HW_CYCLES_PER_SEC
default "$(DT_STM32_CPU_CLOCK_FREQ)" if "$(dt_nodelabel_enabled,cpusw)" default "$(DT_STM32_CPU_CLOCK_FREQ)" if "$(dt_nodelabel_enabled,cpusw)"
config STM32_LTDC_FB_SMH_ALIGN
default 256 if MEMC_STM32_XSPI_PSRAM && SHARED_MULTI_HEAP && \
STM32_LTDC_FB_USE_SHARED_MULTI_HEAP
endif # SOC_SERIES_STM32N6X endif # SOC_SERIES_STM32N6X