From 6274df7a0bb2c6731d2e521a7ea0ea695c3dcd29 Mon Sep 17 00:00:00 2001 From: Alain Volmat Date: Tue, 17 Jun 2025 12:29:08 +0200 Subject: [PATCH] soc: st: stm32: stm32n6: set 256 SMH buffer alignment for LTDC Set the LTDC buffer alignment to 256 in order to avoid an issue when accessing to PSRAM via XSPI. Signed-off-by: Alain Volmat --- soc/st/stm32/stm32n6x/Kconfig.defconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/soc/st/stm32/stm32n6x/Kconfig.defconfig b/soc/st/stm32/stm32n6x/Kconfig.defconfig index 2e9856e8b02..4f92e59ac9c 100644 --- a/soc/st/stm32/stm32n6x/Kconfig.defconfig +++ b/soc/st/stm32/stm32n6x/Kconfig.defconfig @@ -14,4 +14,8 @@ DT_STM32_CPU_CLOCK_FREQ := $(dt_node_int_prop_int,$(DT_STM32_CPU_CLOCK_PATH),clo config SYS_CLOCK_HW_CYCLES_PER_SEC default "$(DT_STM32_CPU_CLOCK_FREQ)" if "$(dt_nodelabel_enabled,cpusw)" +config STM32_LTDC_FB_SMH_ALIGN + default 256 if MEMC_STM32_XSPI_PSRAM && SHARED_MULTI_HEAP && \ + STM32_LTDC_FB_USE_SHARED_MULTI_HEAP + endif # SOC_SERIES_STM32N6X