boards: esp32s3_devkitm: add appcpu board model
Adds into esp32s3_devkitm the appcpu board to allow building applications running in ESP32S3 2nd core (appcpu). Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
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6 changed files with 99 additions and 4 deletions
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@ -6,6 +6,10 @@ config BOARD_ESP32S3_DEVKITM
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bool "ESP32S3 DevKitM Board"
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bool "ESP32S3 DevKitM Board"
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depends on SOC_SERIES_ESP32S3
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depends on SOC_SERIES_ESP32S3
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config BOARD_ESP32S3_DEVKITM_APPCPU
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bool "ESP32S3 Board configuration for APPCPU (core 1)."
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depends on SOC_SERIES_ESP32S3 && SOC_ESP32S3_APPCPU
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choice SOC_PART_NUMBER
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choice SOC_PART_NUMBER
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default SOC_ESP32S3_MINI_N8
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default SOC_ESP32S3_MINI_N8
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endchoice
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endchoice
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@ -3,12 +3,10 @@
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# Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd.
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# Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd.
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# SPDX-License-Identifier: Apache-2.0
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_ESP32S3_DEVKITM
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config BOARD
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config BOARD
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default "esp32s3_devkitm"
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default "esp32s3_devkitm"
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depends on BOARD_ESP32S3_DEVKITM
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config ENTROPY_GENERATOR
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default y
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config HEAP_MEM_POOL_SIZE
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config HEAP_MEM_POOL_SIZE
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default 98304 if WIFI
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default 98304 if WIFI
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@ -18,3 +16,20 @@ config HEAP_MEM_POOL_SIZE
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choice BT_HCI_BUS_TYPE
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choice BT_HCI_BUS_TYPE
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default BT_ESP32 if BT
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default BT_ESP32 if BT
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endchoice
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endchoice
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endif
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if BOARD_ESP32S3_DEVKITM_APPCPU
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config BOARD
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default "esp32s3_devkitm_appcpu"
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config HEAP_MEM_POOL_SIZE
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default 4096
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config KERNEL_BIN_NAME
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default "esp32_net_firmware"
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endif
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config ENTROPY_GENERATOR
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default y
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@ -71,6 +71,13 @@ Security:
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- 4-Kbit OTP, up to 1792 bits for users
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- 4-Kbit OTP, up to 1792 bits for users
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- Cryptographic hardware acceleration: (AES-128/256, Hash, RSA, RNG, HMAC, Digital signature)
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- Cryptographic hardware acceleration: (AES-128/256, Hash, RSA, RNG, HMAC, Digital signature)
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Asymmetric Multiprocessing (AMP)
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********************************
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ESP32S3-DevKitM allows 2 different applications to be executed in ESP32-S3 SoC. Due to its dual-core
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architecture, each core can be enabled to execute customized tasks in stand-alone mode
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and/or exchanging data over OpenAMP framework. See :ref:`ipc_samples` folder as code reference.
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For more information, check the datasheet at `ESP32-S3 Datasheet`_.
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For more information, check the datasheet at `ESP32-S3 Datasheet`_.
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Supported Features
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Supported Features
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34
boards/xtensa/esp32s3_devkitm/esp32s3_devkitm_appcpu.dts
Normal file
34
boards/xtensa/esp32s3_devkitm/esp32s3_devkitm_appcpu.dts
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@ -0,0 +1,34 @@
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/*
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* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <espressif/esp32s3/esp32s3_appcpu.dtsi>
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/ {
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model = "esp32s3_appcpu";
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compatible = "espressif,esp32s3_appcpu";
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chosen {
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zephyr,sram = &sram0;
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zephyr,ipc_shm = &shm0;
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zephyr,ipc = &ipm0;
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};
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};
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&cpu0 {
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clock-frequency = <ESP32_CLK_CPU_240M>;
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};
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&cpu1 {
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clock-frequency = <ESP32_CLK_CPU_240M>;
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};
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&trng0 {
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status = "okay";
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};
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&ipm0 {
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status = "okay";
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};
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26
boards/xtensa/esp32s3_devkitm/esp32s3_devkitm_appcpu.yaml
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26
boards/xtensa/esp32s3_devkitm/esp32s3_devkitm_appcpu.yaml
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@ -0,0 +1,26 @@
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identifier: esp32s3_devkitm_appcpu
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name: ESP32S3 DEVKITM APPCPU
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type: mcu
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arch: xtensa
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toolchain:
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- zephyr
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supported:
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- uart
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testing:
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ignore_tags:
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- net
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- bluetooth
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- flash
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- cpp
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- posix
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- watchdog
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- logging
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- kernel
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- pm
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- gpio
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- crypto
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- eeprom
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- heap
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- cmsis_rtos
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- jwt
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- zdsp
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@ -0,0 +1,9 @@
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# SPDX-License-Identifier: Apache-2.0
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CONFIG_SOC_SERIES_ESP32S3=y
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CONFIG_SOC_ESP32S3_APPCPU=y
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CONFIG_BOARD_ESP32S3_DEVKITM_APPCPU=y
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CONFIG_MAIN_STACK_SIZE=2048
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CONFIG_CLOCK_CONTROL=y
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CONFIG_MINIMAL_LIBC=y
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