diff --git a/boards/xtensa/esp32s3_devkitm/Kconfig.board b/boards/xtensa/esp32s3_devkitm/Kconfig.board index 96de0fb06f7..3f899740c0d 100644 --- a/boards/xtensa/esp32s3_devkitm/Kconfig.board +++ b/boards/xtensa/esp32s3_devkitm/Kconfig.board @@ -6,6 +6,10 @@ config BOARD_ESP32S3_DEVKITM bool "ESP32S3 DevKitM Board" depends on SOC_SERIES_ESP32S3 +config BOARD_ESP32S3_DEVKITM_APPCPU + bool "ESP32S3 Board configuration for APPCPU (core 1)." + depends on SOC_SERIES_ESP32S3 && SOC_ESP32S3_APPCPU + choice SOC_PART_NUMBER default SOC_ESP32S3_MINI_N8 endchoice diff --git a/boards/xtensa/esp32s3_devkitm/Kconfig.defconfig b/boards/xtensa/esp32s3_devkitm/Kconfig.defconfig index e0dc279412f..cb102b4ee64 100644 --- a/boards/xtensa/esp32s3_devkitm/Kconfig.defconfig +++ b/boards/xtensa/esp32s3_devkitm/Kconfig.defconfig @@ -3,12 +3,10 @@ # Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd. # SPDX-License-Identifier: Apache-2.0 +if BOARD_ESP32S3_DEVKITM + config BOARD default "esp32s3_devkitm" - depends on BOARD_ESP32S3_DEVKITM - -config ENTROPY_GENERATOR - default y config HEAP_MEM_POOL_SIZE default 98304 if WIFI @@ -18,3 +16,20 @@ config HEAP_MEM_POOL_SIZE choice BT_HCI_BUS_TYPE default BT_ESP32 if BT endchoice + +endif + +if BOARD_ESP32S3_DEVKITM_APPCPU + +config BOARD + default "esp32s3_devkitm_appcpu" + +config HEAP_MEM_POOL_SIZE + default 4096 + +config KERNEL_BIN_NAME + default "esp32_net_firmware" +endif + +config ENTROPY_GENERATOR + default y diff --git a/boards/xtensa/esp32s3_devkitm/doc/index.rst b/boards/xtensa/esp32s3_devkitm/doc/index.rst index 5684ad69118..caa9f6a240f 100644 --- a/boards/xtensa/esp32s3_devkitm/doc/index.rst +++ b/boards/xtensa/esp32s3_devkitm/doc/index.rst @@ -71,6 +71,13 @@ Security: - 4-Kbit OTP, up to 1792 bits for users - Cryptographic hardware acceleration: (AES-128/256, Hash, RSA, RNG, HMAC, Digital signature) +Asymmetric Multiprocessing (AMP) +******************************** + +ESP32S3-DevKitM allows 2 different applications to be executed in ESP32-S3 SoC. Due to its dual-core +architecture, each core can be enabled to execute customized tasks in stand-alone mode +and/or exchanging data over OpenAMP framework. See :ref:`ipc_samples` folder as code reference. + For more information, check the datasheet at `ESP32-S3 Datasheet`_. Supported Features diff --git a/boards/xtensa/esp32s3_devkitm/esp32s3_devkitm_appcpu.dts b/boards/xtensa/esp32s3_devkitm/esp32s3_devkitm_appcpu.dts new file mode 100644 index 00000000000..ae68f094e14 --- /dev/null +++ b/boards/xtensa/esp32s3_devkitm/esp32s3_devkitm_appcpu.dts @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ +/dts-v1/; + +#include +/ { + model = "esp32s3_appcpu"; + compatible = "espressif,esp32s3_appcpu"; + + chosen { + zephyr,sram = &sram0; + zephyr,ipc_shm = &shm0; + zephyr,ipc = &ipm0; + }; +}; + +&cpu0 { + clock-frequency = ; +}; + +&cpu1 { + clock-frequency = ; +}; + +&trng0 { + status = "okay"; +}; + +&ipm0 { + status = "okay"; +}; diff --git a/boards/xtensa/esp32s3_devkitm/esp32s3_devkitm_appcpu.yaml b/boards/xtensa/esp32s3_devkitm/esp32s3_devkitm_appcpu.yaml new file mode 100644 index 00000000000..b6145d0f965 --- /dev/null +++ b/boards/xtensa/esp32s3_devkitm/esp32s3_devkitm_appcpu.yaml @@ -0,0 +1,26 @@ +identifier: esp32s3_devkitm_appcpu +name: ESP32S3 DEVKITM APPCPU +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - uart +testing: + ignore_tags: + - net + - bluetooth + - flash + - cpp + - posix + - watchdog + - logging + - kernel + - pm + - gpio + - crypto + - eeprom + - heap + - cmsis_rtos + - jwt + - zdsp diff --git a/boards/xtensa/esp32s3_devkitm/esp32s3_devkitm_appcpu_defconfig b/boards/xtensa/esp32s3_devkitm/esp32s3_devkitm_appcpu_defconfig new file mode 100644 index 00000000000..e554a951263 --- /dev/null +++ b/boards/xtensa/esp32s3_devkitm/esp32s3_devkitm_appcpu_defconfig @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_SOC_SERIES_ESP32S3=y +CONFIG_SOC_ESP32S3_APPCPU=y +CONFIG_BOARD_ESP32S3_DEVKITM_APPCPU=y + +CONFIG_MAIN_STACK_SIZE=2048 +CONFIG_CLOCK_CONTROL=y +CONFIG_MINIMAL_LIBC=y