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boards: Rename reserved function names

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Rename reserved function names in the boards/ subdirectory.

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
This commit is contained in:
Patrik Flykt 2019-03-14 14:06:22 -06:00 • committed by Anas Nashif
commit 5aecf9db37
12 changed files with 41 additions and 41 deletions
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6
boards/posix/native_posix/board_irq.h
View file

@ -15,7 +15,7 @@
extern "C" { extern "C" {
#endif #endif
void _isr_declare(unsigned int irq_p, int flags, void isr_p(void *), void z_isr_declare(unsigned int irq_p, int flags, void isr_p(void *),
void *isr_param_p); void *isr_param_p);
void z_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags); void z_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags);
@ -32,7 +32,7 @@ void z_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags);
*/ */
#define Z_ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) \ #define Z_ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) \
({ \ ({ \
_isr_declare(irq_p, 0, isr_p, isr_param_p); \ z_isr_declare(irq_p, 0, isr_p, isr_param_p); \
z_irq_priority_set(irq_p, priority_p, flags_p); \ z_irq_priority_set(irq_p, priority_p, flags_p); \
irq_p; \ irq_p; \
}) })
@ -45,7 +45,7 @@ void z_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags);
*/ */
#define Z_ARCH_IRQ_DIRECT_CONNECT(irq_p, priority_p, isr_p, flags_p) \ #define Z_ARCH_IRQ_DIRECT_CONNECT(irq_p, priority_p, isr_p, flags_p) \
({ \ ({ \
_isr_declare(irq_p, ISR_FLAG_DIRECT, (void (*)(void *))isr_p, NULL); \ z_isr_declare(irq_p, ISR_FLAG_DIRECT, (void (*)(void *))isr_p, NULL); \
z_irq_priority_set(irq_p, priority_p, flags_p); \ z_irq_priority_set(irq_p, priority_p, flags_p); \
irq_p; \ irq_p; \
}) })

6
boards/posix/native_posix/irq_handler.c
View file

@ -235,7 +235,7 @@ int posix_get_current_irq(void)
/** /**
* Configure a static interrupt. * Configure a static interrupt.
* *
* _isr_declare will populate the interrupt table table with the interrupt's * z_isr_declare will populate the interrupt table table with the interrupt's
* parameters, the vector table and the software ISR table. * parameters, the vector table and the software ISR table.
* *
* We additionally set the priority in the interrupt controller at * We additionally set the priority in the interrupt controller at
@ -247,7 +247,7 @@ int posix_get_current_irq(void)
* @param isr_param_p ISR parameter * @param isr_param_p ISR parameter
* @param flags_p IRQ options * @param flags_p IRQ options
*/ */
void _isr_declare(unsigned int irq_p, int flags, void isr_p(void *), void z_isr_declare(unsigned int irq_p, int flags, void isr_p(void *),
void *isr_param_p) void *isr_param_p)
{ {
irq_vector_table[irq_p].irq = irq_p; irq_vector_table[irq_p].irq = irq_p;
@ -316,7 +316,7 @@ void irq_offload(irq_offload_routine_t routine, void *parameter)
{ {
off_routine = routine; off_routine = routine;
off_parameter = parameter; off_parameter = parameter;
_isr_declare(OFFLOAD_SW_IRQ, 0, offload_sw_irq_handler, NULL); z_isr_declare(OFFLOAD_SW_IRQ, 0, offload_sw_irq_handler, NULL);
z_arch_irq_enable(OFFLOAD_SW_IRQ); z_arch_irq_enable(OFFLOAD_SW_IRQ);
posix_sw_set_pending_IRQ(OFFLOAD_SW_IRQ); posix_sw_set_pending_IRQ(OFFLOAD_SW_IRQ);
z_arch_irq_disable(OFFLOAD_SW_IRQ); z_arch_irq_disable(OFFLOAD_SW_IRQ);

6
boards/posix/nrf52_bsim/board_irq.h
View file

@ -15,7 +15,7 @@
extern "C" { extern "C" {
#endif #endif
void _isr_declare(unsigned int irq_p, int flags, void isr_p(void *), void z_isr_declare(unsigned int irq_p, int flags, void isr_p(void *),
void *isr_param_p); void *isr_param_p);
void z_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags); void z_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags);
@ -32,7 +32,7 @@ void z_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags);
*/ */
#define Z_ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) \ #define Z_ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) \
({ \ ({ \
_isr_declare(irq_p, 0, isr_p, isr_param_p); \ z_isr_declare(irq_p, 0, isr_p, isr_param_p); \
z_irq_priority_set(irq_p, priority_p, flags_p); \ z_irq_priority_set(irq_p, priority_p, flags_p); \
irq_p; \ irq_p; \
}) })
@ -45,7 +45,7 @@ void z_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags);
*/ */
#define Z_ARCH_IRQ_DIRECT_CONNECT(irq_p, priority_p, isr_p, flags_p) \ #define Z_ARCH_IRQ_DIRECT_CONNECT(irq_p, priority_p, isr_p, flags_p) \
({ \ ({ \
_isr_declare(irq_p, ISR_FLAG_DIRECT, (void (*)(void *))isr_p, NULL); \ z_isr_declare(irq_p, ISR_FLAG_DIRECT, (void (*)(void *))isr_p, NULL); \
z_irq_priority_set(irq_p, priority_p, flags_p); \ z_irq_priority_set(irq_p, priority_p, flags_p); \
irq_p; \ irq_p; \
}) })

6
boards/posix/nrf52_bsim/irq_handler.c
View file

@ -298,7 +298,7 @@ int posix_get_current_irq(void)
/** /**
* Configure a static interrupt. * Configure a static interrupt.
* *
* _isr_declare will populate the interrupt table table with the interrupt's * z_isr_declare will populate the interrupt table table with the interrupt's
* parameters, the vector table and the software ISR table. * parameters, the vector table and the software ISR table.
* *
* We additionally set the priority in the interrupt controller at * We additionally set the priority in the interrupt controller at
@ -310,7 +310,7 @@ int posix_get_current_irq(void)
* @param isr_param_p ISR parameter * @param isr_param_p ISR parameter
* @param flags_p IRQ options * @param flags_p IRQ options
*/ */
void _isr_declare(unsigned int irq_p, int flags, void isr_p(void *), void z_isr_declare(unsigned int irq_p, int flags, void isr_p(void *),
void *isr_param_p) void *isr_param_p)
{ {
irq_vector_table[irq_p].irq = irq_p; irq_vector_table[irq_p].irq = irq_p;
@ -379,7 +379,7 @@ void irq_offload(irq_offload_routine_t routine, void *parameter)
{ {
off_routine = routine; off_routine = routine;
off_parameter = parameter; off_parameter = parameter;
_isr_declare(OFFLOAD_SW_IRQ, 0, offload_sw_irq_handler, NULL); z_isr_declare(OFFLOAD_SW_IRQ, 0, offload_sw_irq_handler, NULL);
z_arch_irq_enable(OFFLOAD_SW_IRQ); z_arch_irq_enable(OFFLOAD_SW_IRQ);
posix_sw_set_pending_IRQ(OFFLOAD_SW_IRQ); posix_sw_set_pending_IRQ(OFFLOAD_SW_IRQ);
z_arch_irq_disable(OFFLOAD_SW_IRQ); z_arch_irq_disable(OFFLOAD_SW_IRQ);

4
boards/riscv32/hifive1/prci.h
View file

@ -7,8 +7,8 @@
#ifndef _SIFIVE_PRCI_H #ifndef _SIFIVE_PRCI_H
#define _SIFIVE_PRCI_H #define _SIFIVE_PRCI_H
#define _REG32(p, i) (*(volatile uint32_t *) ((p) + (i))) #define Z_REG32(p, i) (*(volatile uint32_t *) ((p) + (i)))
#define PRCI_REG(offset) _REG32(PRCI_BASE_ADDR, offset) #define PRCI_REG(offset) Z_REG32(PRCI_BASE_ADDR, offset)
/* Register offsets */ /* Register offsets */

12
boards/x86/arduino_101/pinmux.c
View file

@ -18,7 +18,7 @@
/* /*
* This is the full pinmap that we have available on the board for configuration * This is the full pinmap that we have available on the board for configuration
* including the ball position and the various modes that can be set. In the * including the ball position and the various modes that can be set. In the
* _pinmux_defaults we do not spend any time setting values that are using mode * pinmux_defaults we do not spend any time setting values that are using mode
* A as the hardware brings up all devices by default in mode A. * A as the hardware brings up all devices by default in mode A.
*/ */
@ -111,7 +111,7 @@
*/ */
#define PINMUX_MAX_REGISTERS 5 #define PINMUX_MAX_REGISTERS 5
static void _pinmux_defaults(u32_t base) static void pinmux_defaults(u32_t base)
{ {
u32_t mux_config[PINMUX_MAX_REGISTERS] = { 0, 0, 0, 0, 0 }; u32_t mux_config[PINMUX_MAX_REGISTERS] = { 0, 0, 0, 0, 0 };
int i = 0; int i = 0;
@ -151,9 +151,9 @@ static void _pinmux_defaults(u32_t base)
} }
} }
static inline void _pinmux_pullups(u32_t base_address) static inline void pinmux_pullups(u32_t base_address)
{ {
_quark_mcu_set_mux(base_address + PINMUX_PULLUP_OFFSET, 104, z_quark_mcu_set_mux(base_address + PINMUX_PULLUP_OFFSET, 104,
PINMUX_PULLUP_ENABLE); PINMUX_PULLUP_ENABLE);
} }
@ -161,8 +161,8 @@ static int pinmux_initialize(struct device *port)
{ {
ARG_UNUSED(port); ARG_UNUSED(port);
_pinmux_defaults(PINMUX_BASE_ADDR); pinmux_defaults(PINMUX_BASE_ADDR);
_pinmux_pullups(PINMUX_BASE_ADDR); pinmux_pullups(PINMUX_BASE_ADDR);
return 0; return 0;
} }

10
boards/x86/galileo/pinmux.c
View file

@ -482,7 +482,7 @@ static struct mux_path _galileo_path[PINMUX_NUM_PINS * NUM_PIN_FUNCS] = {
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } }, { NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
}; };
int _galileo_pinmux_set_pin(struct device *port, u8_t pin, u32_t func) int z_galileo_pinmux_set_pin(struct device *port, u8_t pin, u32_t func)
{ {
struct galileo_data * const drv_data = port->driver_data; struct galileo_data * const drv_data = port->driver_data;
@ -576,7 +576,7 @@ int _galileo_pinmux_set_pin(struct device *port, u8_t pin, u32_t func)
return 0; return 0;
} }
int _galileo_pinmux_get_pin(struct device *port, u32_t pin, u32_t *func) int z_galileo_pinmux_get_pin(struct device *port, u32_t pin, u32_t *func)
{ {
struct galileo_data * const drv_data = port->driver_data; struct galileo_data * const drv_data = port->driver_data;
struct pin_config *mux_config = drv_data->mux_config; struct pin_config *mux_config = drv_data->mux_config;
@ -662,7 +662,7 @@ static int pinmux_set(struct device *dev,
return -EINVAL; return -EINVAL;
} }
return _galileo_pinmux_set_pin(dev, pin, func); return z_galileo_pinmux_set_pin(dev, pin, func);
} }
static int pinmux_get(struct device *dev, static int pinmux_get(struct device *dev,
@ -673,7 +673,7 @@ static int pinmux_get(struct device *dev,
return -EINVAL; return -EINVAL;
} }
return _galileo_pinmux_get_pin(dev, pin, func); return z_galileo_pinmux_get_pin(dev, pin, func);
} }
static struct pinmux_driver_api api_funcs = { static struct pinmux_driver_api api_funcs = {
@ -733,7 +733,7 @@ static int pinmux_galileo_initialize(struct device *port)
* from the above mapping as selected by the end user * from the above mapping as selected by the end user
*/ */
for (i = 0; i < PINMUX_NUM_PINS; i++) { for (i = 0; i < PINMUX_NUM_PINS; i++) {
_galileo_pinmux_set_pin(port, z_galileo_pinmux_set_pin(port,
mux_config[i].pin_num, mux_config[i].pin_num,
mux_config[i].mode); mux_config[i].mode);
} }

4
boards/x86/galileo/pinmux_galileo.h
View file

@ -29,8 +29,8 @@ struct galileo_data {
struct galileo_data galileo_pinmux_driver; struct galileo_data galileo_pinmux_driver;
int _galileo_pinmux_set_pin(struct device *port, u8_t pin, u32_t func); int z_galileo_pinmux_set_pin(struct device *port, u8_t pin, u32_t func);
int _galileo_pinmux_get_pin(struct device *port, u32_t pin, u32_t *func); int z_galileo_pinmux_get_pin(struct device *port, u32_t pin, u32_t *func);
#endif /* __PINMUX_GALILEO_PRIV_H */ #endif /* __PINMUX_GALILEO_PRIV_H */

8
boards/x86/quark_d2000_crb/pinmux.c
View file

@ -30,7 +30,7 @@
* associated pins and ball points. * associated pins and ball points.
* This is the full pinmap that we have available on the board for configuration * This is the full pinmap that we have available on the board for configuration
* including the ball position and the various modes that can be set. In the * including the ball position and the various modes that can be set. In the
* _pinmux_defaults we do not spend any time setting values that are using mode * pinmux_defaults we do not spend any time setting values that are using mode
* A as the hardware brings up all devices by default in mode A. * A as the hardware brings up all devices by default in mode A.
*/ */
/* pin, ball, mode A, mode B, mode C */ /* pin, ball, mode A, mode B, mode C */
@ -64,7 +64,7 @@
#define PINMUX_MAX_REGISTERS 2 #define PINMUX_MAX_REGISTERS 2
static void _pinmux_defaults(u32_t base) static void pinmux_defaults(u32_t base)
{ {
u32_t mux_config[PINMUX_MAX_REGISTERS] = { 0, 0 }; u32_t mux_config[PINMUX_MAX_REGISTERS] = { 0, 0 };
int i = 0; int i = 0;
@ -91,10 +91,10 @@ static int pinmux_initialize(struct device *port)
{ {
ARG_UNUSED(port); ARG_UNUSED(port);
_pinmux_defaults(PINMUX_BASE_ADDR); pinmux_defaults(PINMUX_BASE_ADDR);
/* Enable the UART RX pin to receive input */ /* Enable the UART RX pin to receive input */
_quark_mcu_set_mux(PINMUX_BASE_ADDR + PINMUX_INPUT_OFFSET, 5, 0x1); z_quark_mcu_set_mux(PINMUX_BASE_ADDR + PINMUX_INPUT_OFFSET, 5, 0x1);
return 0; return 0;
} }

6
boards/x86/quark_se_c1000_devboard/pinmux.c
View file

@ -19,7 +19,7 @@
/* /*
* This is the full pinmap that we have available on the board for configuration * This is the full pinmap that we have available on the board for configuration
* including the ball position and the various modes that can be set. In the * including the ball position and the various modes that can be set. In the
* _pinmux_defaults we do not spend any time setting values that are using mode * pinmux_defaults we do not spend any time setting values that are using mode
* A as the hardware brings up all devices by default in mode A. * A as the hardware brings up all devices by default in mode A.
*/ */
@ -100,7 +100,7 @@
* the bit description from above * the bit description from above
*/ */
#define PINMUX_MAX_REGISTERS 5 #define PINMUX_MAX_REGISTERS 5
static void _pinmux_defaults(u32_t base) static void pinmux_defaults(u32_t base)
{ {
u32_t mux_config[PINMUX_MAX_REGISTERS] = { 0, 0, 0, 0, 0}; u32_t mux_config[PINMUX_MAX_REGISTERS] = { 0, 0, 0, 0, 0};
int i = 0; int i = 0;
@ -144,7 +144,7 @@ static int pinmux_initialize(struct device *port)
{ {
ARG_UNUSED(port); ARG_UNUSED(port);
_pinmux_defaults(PINMUX_BASE_ADDR); pinmux_defaults(PINMUX_BASE_ADDR);
return 0; return 0;
} }

12
boards/x86/tinytile/pinmux.c
View file

@ -18,7 +18,7 @@
/* /*
* This is the full pinmap that we have available on the board for configuration * This is the full pinmap that we have available on the board for configuration
* including the ball position and the various modes that can be set. In the * including the ball position and the various modes that can be set. In the
* _pinmux_defaults we do not spend any time setting values that are using mode * pinmux_defaults we do not spend any time setting values that are using mode
* A as the hardware brings up all devices by default in mode A. * A as the hardware brings up all devices by default in mode A.
*/ */
@ -111,7 +111,7 @@
*/ */
#define PINMUX_MAX_REGISTERS 5 #define PINMUX_MAX_REGISTERS 5
static void _pinmux_defaults(u32_t base) static void pinmux_defaults(u32_t base)
{ {
u32_t mux_config[PINMUX_MAX_REGISTERS] = { 0, 0, 0, 0, 0 }; u32_t mux_config[PINMUX_MAX_REGISTERS] = { 0, 0, 0, 0, 0 };
int i = 0; int i = 0;
@ -151,9 +151,9 @@ static void _pinmux_defaults(u32_t base)
} }
} }
static inline void _pinmux_pullups(u32_t base_address) static inline void pinmux_pullups(u32_t base_address)
{ {
_quark_mcu_set_mux(base_address + PINMUX_PULLUP_OFFSET, 104, z_quark_mcu_set_mux(base_address + PINMUX_PULLUP_OFFSET, 104,
PINMUX_PULLUP_ENABLE); PINMUX_PULLUP_ENABLE);
} }
@ -161,8 +161,8 @@ static int pinmux_initialize(struct device *port)
{ {
ARG_UNUSED(port); ARG_UNUSED(port);
_pinmux_defaults(PINMUX_BASE_ADDR); pinmux_defaults(PINMUX_BASE_ADDR);
_pinmux_pullups(PINMUX_BASE_ADDR); pinmux_pullups(PINMUX_BASE_ADDR);
return 0; return 0;
} }

2
soc/x86/intel_quark/include/pinmux_quark_mcu.h
View file

@ -34,7 +34,7 @@
#define PIN_CONFIG(A, _pin, _func) \ #define PIN_CONFIG(A, _pin, _func) \
(A[((_pin) / 16)] |= ((0x3 & (_func)) << (((_pin) % 16) * 2))) (A[((_pin) / 16)] |= ((0x3 & (_func)) << (((_pin) % 16) * 2)))
static inline int _quark_mcu_set_mux(u32_t base, u32_t pin, u8_t func) static inline int z_quark_mcu_set_mux(u32_t base, u32_t pin, u8_t func)
{ {
/* /*
* the registers are 32-bit wide, but each pin requires 1 bit * the registers are 32-bit wide, but each pin requires 1 bit