diff --git a/boards/posix/native_posix/board_irq.h b/boards/posix/native_posix/board_irq.h
index 16e09ded286..2b1174c0a5b 100644
--- a/boards/posix/native_posix/board_irq.h
+++ b/boards/posix/native_posix/board_irq.h
@@ -15,7 +15,7 @@
 extern "C" {
 #endif
 
-void _isr_declare(unsigned int irq_p, int flags, void isr_p(void *),
+void z_isr_declare(unsigned int irq_p, int flags, void isr_p(void *),
 		void *isr_param_p);
 void z_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags);
 
@@ -32,7 +32,7 @@ void z_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags);
  */
 #define Z_ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) \
 ({ \
-	_isr_declare(irq_p, 0, isr_p, isr_param_p); \
+	z_isr_declare(irq_p, 0, isr_p, isr_param_p); \
 	z_irq_priority_set(irq_p, priority_p, flags_p); \
 	irq_p; \
 })
@@ -45,7 +45,7 @@ void z_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags);
  */
 #define Z_ARCH_IRQ_DIRECT_CONNECT(irq_p, priority_p, isr_p, flags_p) \
 ({ \
-	_isr_declare(irq_p, ISR_FLAG_DIRECT, (void (*)(void *))isr_p, NULL); \
+	z_isr_declare(irq_p, ISR_FLAG_DIRECT, (void (*)(void *))isr_p, NULL); \
 	z_irq_priority_set(irq_p, priority_p, flags_p); \
 	irq_p; \
 })
diff --git a/boards/posix/native_posix/irq_handler.c b/boards/posix/native_posix/irq_handler.c
index cb0691f7f48..31225c62a4f 100644
--- a/boards/posix/native_posix/irq_handler.c
+++ b/boards/posix/native_posix/irq_handler.c
@@ -235,7 +235,7 @@ int posix_get_current_irq(void)
 /**
  * Configure a static interrupt.
  *
- * _isr_declare will populate the interrupt table table with the interrupt's
+ * z_isr_declare will populate the interrupt table table with the interrupt's
  * parameters, the vector table and the software ISR table.
  *
  * We additionally set the priority in the interrupt controller at
@@ -247,7 +247,7 @@ int posix_get_current_irq(void)
  * @param isr_param_p ISR parameter
  * @param flags_p IRQ options
  */
-void _isr_declare(unsigned int irq_p, int flags, void isr_p(void *),
+void z_isr_declare(unsigned int irq_p, int flags, void isr_p(void *),
 		void *isr_param_p)
 {
 	irq_vector_table[irq_p].irq   = irq_p;
@@ -316,7 +316,7 @@ void irq_offload(irq_offload_routine_t routine, void *parameter)
 {
 	off_routine = routine;
 	off_parameter = parameter;
-	_isr_declare(OFFLOAD_SW_IRQ, 0, offload_sw_irq_handler, NULL);
+	z_isr_declare(OFFLOAD_SW_IRQ, 0, offload_sw_irq_handler, NULL);
 	z_arch_irq_enable(OFFLOAD_SW_IRQ);
 	posix_sw_set_pending_IRQ(OFFLOAD_SW_IRQ);
 	z_arch_irq_disable(OFFLOAD_SW_IRQ);
diff --git a/boards/posix/nrf52_bsim/board_irq.h b/boards/posix/nrf52_bsim/board_irq.h
index 16e09ded286..2b1174c0a5b 100644
--- a/boards/posix/nrf52_bsim/board_irq.h
+++ b/boards/posix/nrf52_bsim/board_irq.h
@@ -15,7 +15,7 @@
 extern "C" {
 #endif
 
-void _isr_declare(unsigned int irq_p, int flags, void isr_p(void *),
+void z_isr_declare(unsigned int irq_p, int flags, void isr_p(void *),
 		void *isr_param_p);
 void z_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags);
 
@@ -32,7 +32,7 @@ void z_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags);
  */
 #define Z_ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) \
 ({ \
-	_isr_declare(irq_p, 0, isr_p, isr_param_p); \
+	z_isr_declare(irq_p, 0, isr_p, isr_param_p); \
 	z_irq_priority_set(irq_p, priority_p, flags_p); \
 	irq_p; \
 })
@@ -45,7 +45,7 @@ void z_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags);
  */
 #define Z_ARCH_IRQ_DIRECT_CONNECT(irq_p, priority_p, isr_p, flags_p) \
 ({ \
-	_isr_declare(irq_p, ISR_FLAG_DIRECT, (void (*)(void *))isr_p, NULL); \
+	z_isr_declare(irq_p, ISR_FLAG_DIRECT, (void (*)(void *))isr_p, NULL); \
 	z_irq_priority_set(irq_p, priority_p, flags_p); \
 	irq_p; \
 })
diff --git a/boards/posix/nrf52_bsim/irq_handler.c b/boards/posix/nrf52_bsim/irq_handler.c
index c2fbc0dd682..f11cdf08507 100644
--- a/boards/posix/nrf52_bsim/irq_handler.c
+++ b/boards/posix/nrf52_bsim/irq_handler.c
@@ -298,7 +298,7 @@ int posix_get_current_irq(void)
 /**
  * Configure a static interrupt.
  *
- * _isr_declare will populate the interrupt table table with the interrupt's
+ * z_isr_declare will populate the interrupt table table with the interrupt's
  * parameters, the vector table and the software ISR table.
  *
  * We additionally set the priority in the interrupt controller at
@@ -310,7 +310,7 @@ int posix_get_current_irq(void)
  * @param isr_param_p ISR parameter
  * @param flags_p IRQ options
  */
-void _isr_declare(unsigned int irq_p, int flags, void isr_p(void *),
+void z_isr_declare(unsigned int irq_p, int flags, void isr_p(void *),
 		void *isr_param_p)
 {
 	irq_vector_table[irq_p].irq   = irq_p;
@@ -379,7 +379,7 @@ void irq_offload(irq_offload_routine_t routine, void *parameter)
 {
 	off_routine = routine;
 	off_parameter = parameter;
-	_isr_declare(OFFLOAD_SW_IRQ, 0, offload_sw_irq_handler, NULL);
+	z_isr_declare(OFFLOAD_SW_IRQ, 0, offload_sw_irq_handler, NULL);
 	z_arch_irq_enable(OFFLOAD_SW_IRQ);
 	posix_sw_set_pending_IRQ(OFFLOAD_SW_IRQ);
 	z_arch_irq_disable(OFFLOAD_SW_IRQ);
diff --git a/boards/riscv32/hifive1/prci.h b/boards/riscv32/hifive1/prci.h
index d180d028cfb..7c6da644504 100644
--- a/boards/riscv32/hifive1/prci.h
+++ b/boards/riscv32/hifive1/prci.h
@@ -7,8 +7,8 @@
 #ifndef _SIFIVE_PRCI_H
 #define _SIFIVE_PRCI_H
 
-#define _REG32(p, i) (*(volatile uint32_t *) ((p) + (i)))
-#define PRCI_REG(offset) _REG32(PRCI_BASE_ADDR, offset)
+#define Z_REG32(p, i) (*(volatile uint32_t *) ((p) + (i)))
+#define PRCI_REG(offset) Z_REG32(PRCI_BASE_ADDR, offset)
 
 /* Register offsets */
 
diff --git a/boards/x86/arduino_101/pinmux.c b/boards/x86/arduino_101/pinmux.c
index 36709d917d0..6fd67ebb3a3 100644
--- a/boards/x86/arduino_101/pinmux.c
+++ b/boards/x86/arduino_101/pinmux.c
@@ -18,7 +18,7 @@
 /*
  * This is the full pinmap that we have available on the board for configuration
  * including the ball position and the various modes that can be set.  In the
- * _pinmux_defaults we do not spend any time setting values that are using mode
+ * pinmux_defaults we do not spend any time setting values that are using mode
  * A as the hardware brings up all devices by default in mode A.
  */
 
@@ -111,7 +111,7 @@
  */
 #define PINMUX_MAX_REGISTERS	5
 
-static void _pinmux_defaults(u32_t base)
+static void pinmux_defaults(u32_t base)
 {
 	u32_t mux_config[PINMUX_MAX_REGISTERS] = { 0, 0, 0, 0, 0 };
 	int i = 0;
@@ -151,9 +151,9 @@ static void _pinmux_defaults(u32_t base)
 	}
 }
 
-static inline void _pinmux_pullups(u32_t base_address)
+static inline void pinmux_pullups(u32_t base_address)
 {
-	_quark_mcu_set_mux(base_address + PINMUX_PULLUP_OFFSET, 104,
+	z_quark_mcu_set_mux(base_address + PINMUX_PULLUP_OFFSET, 104,
 			  PINMUX_PULLUP_ENABLE);
 }
 
@@ -161,8 +161,8 @@ static int pinmux_initialize(struct device *port)
 {
 	ARG_UNUSED(port);
 
-	_pinmux_defaults(PINMUX_BASE_ADDR);
-	_pinmux_pullups(PINMUX_BASE_ADDR);
+	pinmux_defaults(PINMUX_BASE_ADDR);
+	pinmux_pullups(PINMUX_BASE_ADDR);
 
 	return 0;
 }
diff --git a/boards/x86/galileo/pinmux.c b/boards/x86/galileo/pinmux.c
index 72d81cf0311..8ae929fca2c 100644
--- a/boards/x86/galileo/pinmux.c
+++ b/boards/x86/galileo/pinmux.c
@@ -482,7 +482,7 @@ static struct mux_path _galileo_path[PINMUX_NUM_PINS * NUM_PIN_FUNCS] = {
 			     { NONE,  0, DONT_CARE, (GPIO_DIR_IN)  } } },
 };
 
-int _galileo_pinmux_set_pin(struct device *port, u8_t pin, u32_t func)
+int z_galileo_pinmux_set_pin(struct device *port, u8_t pin, u32_t func)
 {
 	struct galileo_data * const drv_data = port->driver_data;
 
@@ -576,7 +576,7 @@ int _galileo_pinmux_set_pin(struct device *port, u8_t pin, u32_t func)
 	return 0;
 }
 
-int _galileo_pinmux_get_pin(struct device *port, u32_t pin, u32_t *func)
+int z_galileo_pinmux_get_pin(struct device *port, u32_t pin, u32_t *func)
 {
 	struct galileo_data * const drv_data = port->driver_data;
 	struct pin_config *mux_config = drv_data->mux_config;
@@ -662,7 +662,7 @@ static int pinmux_set(struct device *dev,
 		return -EINVAL;
 	}
 
-	return _galileo_pinmux_set_pin(dev, pin, func);
+	return z_galileo_pinmux_set_pin(dev, pin, func);
 }
 
 static int pinmux_get(struct device *dev,
@@ -673,7 +673,7 @@ static int pinmux_get(struct device *dev,
 		return -EINVAL;
 	}
 
-	return _galileo_pinmux_get_pin(dev, pin, func);
+	return z_galileo_pinmux_get_pin(dev, pin, func);
 }
 
 static struct pinmux_driver_api api_funcs = {
@@ -733,7 +733,7 @@ static int pinmux_galileo_initialize(struct device *port)
 	 * from the above mapping as selected by the end user
 	 */
 	for (i = 0; i < PINMUX_NUM_PINS; i++) {
-		_galileo_pinmux_set_pin(port,
+		z_galileo_pinmux_set_pin(port,
 				 mux_config[i].pin_num,
 				 mux_config[i].mode);
 	}
diff --git a/boards/x86/galileo/pinmux_galileo.h b/boards/x86/galileo/pinmux_galileo.h
index 4b0aecb8458..473b4896b6d 100644
--- a/boards/x86/galileo/pinmux_galileo.h
+++ b/boards/x86/galileo/pinmux_galileo.h
@@ -29,8 +29,8 @@ struct galileo_data {
 
 struct galileo_data galileo_pinmux_driver;
 
-int _galileo_pinmux_set_pin(struct device *port, u8_t pin, u32_t func);
+int z_galileo_pinmux_set_pin(struct device *port, u8_t pin, u32_t func);
 
-int _galileo_pinmux_get_pin(struct device *port, u32_t pin, u32_t *func);
+int z_galileo_pinmux_get_pin(struct device *port, u32_t pin, u32_t *func);
 
 #endif /* __PINMUX_GALILEO_PRIV_H */
diff --git a/boards/x86/quark_d2000_crb/pinmux.c b/boards/x86/quark_d2000_crb/pinmux.c
index f8bd46f7728..f88771e883d 100644
--- a/boards/x86/quark_d2000_crb/pinmux.c
+++ b/boards/x86/quark_d2000_crb/pinmux.c
@@ -30,7 +30,7 @@
  * associated pins and ball points.
  * This is the full pinmap that we have available on the board for configuration
  * including the ball position and the various modes that can be set.  In the
- * _pinmux_defaults we do not spend any time setting values that are using mode
+ * pinmux_defaults we do not spend any time setting values that are using mode
  * A as the hardware brings up all devices by default in mode A.
  */
 	/* pin, ball, mode A, mode B,      mode C       */
@@ -64,7 +64,7 @@
 
 #define PINMUX_MAX_REGISTERS 2
 
-static void _pinmux_defaults(u32_t base)
+static void pinmux_defaults(u32_t base)
 {
 	u32_t mux_config[PINMUX_MAX_REGISTERS] = { 0, 0 };
 	int i = 0;
@@ -91,10 +91,10 @@ static int pinmux_initialize(struct device *port)
 {
 	ARG_UNUSED(port);
 
-	_pinmux_defaults(PINMUX_BASE_ADDR);
+	pinmux_defaults(PINMUX_BASE_ADDR);
 
 	/* Enable the UART RX pin to receive input */
-	_quark_mcu_set_mux(PINMUX_BASE_ADDR + PINMUX_INPUT_OFFSET, 5, 0x1);
+	z_quark_mcu_set_mux(PINMUX_BASE_ADDR + PINMUX_INPUT_OFFSET, 5, 0x1);
 
 	return 0;
 }
diff --git a/boards/x86/quark_se_c1000_devboard/pinmux.c b/boards/x86/quark_se_c1000_devboard/pinmux.c
index bc9c9f0e553..c810b983901 100644
--- a/boards/x86/quark_se_c1000_devboard/pinmux.c
+++ b/boards/x86/quark_se_c1000_devboard/pinmux.c
@@ -19,7 +19,7 @@
 /*
  * This is the full pinmap that we have available on the board for configuration
  * including the ball position and the various modes that can be set.  In the
- * _pinmux_defaults we do not spend any time setting values that are using mode
+ * pinmux_defaults we do not spend any time setting values that are using mode
  * A as the hardware brings up all devices by default in mode A.
  */
 
@@ -100,7 +100,7 @@
  * the bit description from above
  */
 #define PINMUX_MAX_REGISTERS	5
-static void _pinmux_defaults(u32_t base)
+static void pinmux_defaults(u32_t base)
 {
 	u32_t mux_config[PINMUX_MAX_REGISTERS] = { 0, 0, 0, 0, 0};
 	int i = 0;
@@ -144,7 +144,7 @@ static int pinmux_initialize(struct device *port)
 {
 	ARG_UNUSED(port);
 
-	_pinmux_defaults(PINMUX_BASE_ADDR);
+	pinmux_defaults(PINMUX_BASE_ADDR);
 
 	return 0;
 }
diff --git a/boards/x86/tinytile/pinmux.c b/boards/x86/tinytile/pinmux.c
index f23d8016a72..ea6d3146c9c 100644
--- a/boards/x86/tinytile/pinmux.c
+++ b/boards/x86/tinytile/pinmux.c
@@ -18,7 +18,7 @@
 /*
  * This is the full pinmap that we have available on the board for configuration
  * including the ball position and the various modes that can be set.  In the
- * _pinmux_defaults we do not spend any time setting values that are using mode
+ * pinmux_defaults we do not spend any time setting values that are using mode
  * A as the hardware brings up all devices by default in mode A.
  */
 
@@ -111,7 +111,7 @@
  */
 #define PINMUX_MAX_REGISTERS	5
 
-static void _pinmux_defaults(u32_t base)
+static void pinmux_defaults(u32_t base)
 {
 	u32_t mux_config[PINMUX_MAX_REGISTERS] = { 0, 0, 0, 0, 0 };
 	int i = 0;
@@ -151,9 +151,9 @@ static void _pinmux_defaults(u32_t base)
 	}
 }
 
-static inline void _pinmux_pullups(u32_t base_address)
+static inline void pinmux_pullups(u32_t base_address)
 {
-	_quark_mcu_set_mux(base_address + PINMUX_PULLUP_OFFSET, 104,
+	z_quark_mcu_set_mux(base_address + PINMUX_PULLUP_OFFSET, 104,
 			  PINMUX_PULLUP_ENABLE);
 }
 
@@ -161,8 +161,8 @@ static int pinmux_initialize(struct device *port)
 {
 	ARG_UNUSED(port);
 
-	_pinmux_defaults(PINMUX_BASE_ADDR);
-	_pinmux_pullups(PINMUX_BASE_ADDR);
+	pinmux_defaults(PINMUX_BASE_ADDR);
+	pinmux_pullups(PINMUX_BASE_ADDR);
 
 	return 0;
 }
diff --git a/soc/x86/intel_quark/include/pinmux_quark_mcu.h b/soc/x86/intel_quark/include/pinmux_quark_mcu.h
index c8b1bca3efc..ee897012300 100644
--- a/soc/x86/intel_quark/include/pinmux_quark_mcu.h
+++ b/soc/x86/intel_quark/include/pinmux_quark_mcu.h
@@ -34,7 +34,7 @@
 #define PIN_CONFIG(A, _pin, _func) \
 	(A[((_pin) / 16)] |= ((0x3 & (_func)) << (((_pin) % 16) * 2)))
 
-static inline int _quark_mcu_set_mux(u32_t base, u32_t pin, u8_t func)
+static inline int z_quark_mcu_set_mux(u32_t base, u32_t pin, u8_t func)
 {
 	/*
 	 * the registers are 32-bit wide, but each pin requires 1 bit