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soc: arm: microchip: mec172x: Fix eSPI flash operations

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Correct eSPI flash macro so it not always results in zero,
leading to eSPI flash read operation in all cases:
Read, write, erase.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
This commit is contained in:
Jose Alberto Meza 2022-03-31 11:33:39 -07:00 • committed by Anas Nashif
commit 5a3f528387
1 changed files with 2 additions and 1 deletions
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3
soc/arm/microchip_mec/mec172x/reg/mec172x_espi_iom.h
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@ -385,7 +385,8 @@
#define MCHP_ESPI_FC_CTRL_ERS0 0x02u
#define MCHP_ESPI_FC_CTRL_ERL0 0x03u
#define MCHP_ESPI_FC_CTRL_FUNC(f) \
((uint32_t)(f) & MCHP_ESPI_FC_CTRL_FUNC_MASK)
SHLU32((uint32_t)(f), MCHP_ESPI_FC_CTRL_FUNC_POS) & \
MCHP_ESPI_FC_CTRL_FUNC_MASK
#define MCHP_ESPI_FC_CTRL_TAG_POS 4u
#define MCHP_ESPI_FC_CTRL_TAG_MASK0 0x0fu