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soc: xtensa: intel_adsp: cavs: fix assert on L3_MEM_BASE_ADDR

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The assert on L3_MEM_BASE_ADDR is incorrect, we need must convert
to uncached before use.

Fixes: ffd2121c65 ("soc: xtensa: intel_adsp: cavs: fix
  power_down_cavs() signature")
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
This commit is contained in:
Kai Vehmanen 2023-08-31 21:25:59 +03:00 • committed by Anas Nashif
commit 5689916a70
1 changed files with 3 additions and 2 deletions
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5
soc/xtensa/intel_adsp/cavs/power.c
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@ -93,9 +93,10 @@ void pm_state_set(enum pm_state state, uint8_t substate_id)
.adsp_imr_magic = ADSP_IMR_MAGIC_VALUE, .adsp_imr_magic = ADSP_IMR_MAGIC_VALUE,
.imr_restore_vector = rom_entry, .imr_restore_vector = rom_entry,
}; };
struct imr_layout *imr_layout = (struct imr_layout *)L3_MEM_BASE_ADDR; struct imr_layout *imr_layout =
z_soc_uncached_ptr((__sparse_force void __sparse_cache *)
L3_MEM_BASE_ADDR);
__ASSERT_NO_MSG(arch_xtensa_is_ptr_uncached((void *)L3_MEM_BASE_ADDR));
imr_layout->imr_state.header = hdr; imr_layout->imr_state.header = hdr;
#ifdef CONFIG_ADSP_POWER_DOWN_HPSRAM #ifdef CONFIG_ADSP_POWER_DOWN_HPSRAM