soc: espressif: esp32s3: update to hal_espressif v5.1
Modify and reorganize SoC to meet updated hal. Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com> Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
This commit is contained in:
Sylvio Alves
Carles Cufí
parent
072ea896d7
commit
561f31bb54
17 changed files with 804 additions and 844 deletions
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@ -30,7 +30,6 @@
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#define SRAM_IRAM_ORG (SRAM_IRAM_START + CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE)
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#define SRAM_IRAM_SIZE (I_D_SRAM_SIZE + ICACHE_SIZE - CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE)
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#define DCACHE_SIZE 0x10000
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#define SRAM_DRAM_ORG (SRAM_DRAM_START)
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#define DRAM0_0_SEG_LEN I_D_SRAM_SIZE
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@ -41,8 +40,6 @@
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#define RAMABLE_REGION dram0_0_seg
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#define ROMABLE_REGION ROM
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#define EXT_RAM_ORG (0x3E000000 - CONFIG_ESP_SPIRAM_SIZE)
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#ifdef CONFIG_FLASH_SIZE
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#define FLASH_SIZE CONFIG_FLASH_SIZE
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#else
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@ -52,9 +49,12 @@
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#ifdef CONFIG_BOOTLOADER_ESP_IDF
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#define IROM_SEG_ORG 0x42000020
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#define IROM_SEG_LEN FLASH_SIZE-0x20
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#define IROM_SEG_ALIGN 0x10
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#else
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#define IROM_SEG_ORG 0x42000000
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#define IROM_SEG_LEN FLASH_SIZE
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/* MCUBoot requires MMU page size alignment */
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#define IROM_SEG_ALIGN 0x10000
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#endif
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#ifdef CONFIG_SOC_ENABLE_APPCPU
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@ -65,8 +65,6 @@
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#define APPCPU_DRAM_SIZE 0x0
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#endif
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#define IROM_SEG_ALIGN 0x10000
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/* Flash segments (rodata and text) should be mapped in virtual address space by providing VMA.
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* Executing directly from LMA is not possible. */
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#undef GROUP_ROM_LINK_IN
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@ -82,18 +80,18 @@ MEMORY
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irom0_0_seg(RX): org = IROM_SEG_ORG, len = IROM_SEG_LEN
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/* DROM is the first segment placed in generated binary.
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* MCUboot binary for ESP32 has image header of 0x20 bytes.
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/* MCUboot binary for ESP32 has image header of 0x20 bytes.
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* Additional load header of 0x20 bytes are appended to the image.
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* Hence, an offset of 0x40 is added to DROM segment origin.
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*/
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drom0_0_seg(R): org = 0x3C000040, len = FLASH_SIZE - 0x40
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/**
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* `extern_ram_seg` and `drom0_0_seg` share the same bus and the address region.
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* so we allocate `extern_ram_seg` at the end of the address region.
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* `ext_ram_seg` and `drom0_0_seg` share the same bus and the address region.
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* A dummy section is used to avoid overlap. See `.ext_ram.dummy` in `sections.ld.in`
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*/
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#if defined(CONFIG_ESP_SPIRAM)
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ext_ram_seg(RWX): org = EXT_RAM_ORG, len = CONFIG_ESP_SPIRAM_SIZE
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ext_ram_seg(RWX): org = 0x3C000040, len = CONFIG_ESP_SPIRAM_SIZE - 0x40
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#endif
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/* RTC fast memory (executable). Persists over deep sleep.
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@ -113,6 +111,8 @@ MEMORY
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#endif
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}
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_esp_mmu_block_size = (CONFIG_MMU_PAGE_SIZE);
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/* Default entry point: */
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ENTRY(CONFIG_KERNEL_ENTRY)
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@ -155,112 +155,85 @@ SECTIONS
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#include <zephyr/linker/rel-sections.ld>
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_image_drom_start = LOADADDR(_RODATA_SECTION_NAME);
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_image_drom_size = LOADADDR(_RODATA_SECTION_END) + SIZEOF(_RODATA_SECTION_END) - _image_drom_start;
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_image_drom_vaddr = ADDR(_RODATA_SECTION_NAME);
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/* RTC fast memory holds RTC wake stub code */
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.rtc.text :
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{
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. = ALIGN(4);
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_rtc_fast_start = ABSOLUTE(.);
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_rtc_text_start = ABSOLUTE(.);
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*(.rtc.literal .rtc.text)
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*(.rtc.entry.text)
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_rtc_text_end = ABSOLUTE(.);
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} GROUP_DATA_LINK_IN(rtc_iram_seg, ROMABLE_REGION)
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/* NOTE: .rodata section should be the first section in the linker script and no
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* other section should appear before .rodata section. This is the requirement
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* to align ROM section to 64K page offset.
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* Adding .rodata as first section helps to reduce size of generated binary by
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* few kBs.
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/* This section located in RTC FAST Memory area.
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* It holds data marked with RTC_FAST_ATTR attribute.
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* See the file "esp_attr.h" for more information.
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*/
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SECTION_PROLOGUE(_RODATA_SECTION_NAME,,ALIGN(0x10))
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.rtc.force_fast :
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{
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_rodata_reserved_start = ABSOLUTE(.);
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_rodata_start = ABSOLUTE(.);
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*(.rodata_desc .rodata_desc.*) /* Should be the first. App version info. DO NOT PUT ANYTHING BEFORE IT! */
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*(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */
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__rodata_region_start = ABSOLUTE(.);
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. = ALIGN(4);
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#include <snippets-rodata.ld>
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_rtc_force_fast_start = ABSOLUTE(.);
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. = ALIGN(4);
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*(EXCLUDE_FILE (*libarch__xtensa__core.a:* *libkernel.a:fatal.* *libkernel.a:init.* *libzephyr.a:cbprintf_complete* *libzephyr.a:log_core.* *libzephyr.a:log_backend_uart.* *libzephyr.a:log_output.* *libzephyr.a:loader.* *libdrivers__serial.a:uart_esp32.*) .rodata)
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*(EXCLUDE_FILE (*libarch__xtensa__core.a:* *libkernel.a:fatal.* *libkernel.a:init.* *libzephyr.a:cbprintf_complete* *libzephyr.a:log_core.* *libzephyr.a:log_backend_uart.* *libzephyr.a:log_output.* *libzephyr.a:loader.* *libdrivers__serial.a:uart_esp32.*) .rodata.*)
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*(.rtc.force_fast .rtc.force_fast.*)
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. = ALIGN(4) ;
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_rtc_force_fast_end = ABSOLUTE(.);
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} GROUP_DATA_LINK_IN(rtc_data_seg, ROMABLE_REGION)
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*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
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*(.gnu.linkonce.r.*)
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*(.rodata1)
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__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
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*(.xt_except_table)
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*(.gcc_except_table .gcc_except_table.*)
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*(.gnu.linkonce.e.*)
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*(.gnu.version_r)
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. = (. + 3) & ~ 3;
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__eh_frame = ABSOLUTE(.);
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KEEP(*(.eh_frame))
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. = (. + 7) & ~ 3;
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/* C++ exception handlers table: */
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__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
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*(.xt_except_desc)
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*(.gnu.linkonce.h.*)
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__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
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*(.xt_except_desc_end)
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*(.dynamic)
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*(.gnu.version_d)
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. = ALIGN(4);
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__rodata_region_end = ABSOLUTE(.);
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/* Literals are also RO data. */
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_lit4_start = ABSOLUTE(.);
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*(*.lit4)
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*(.lit4.*)
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*(.gnu.linkonce.lit4.*)
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_lit4_end = ABSOLUTE(.);
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. = ALIGN(4);
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*(.rodata_wlog)
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*(.rodata_wlog*)
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. = ALIGN(4);
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} GROUP_DATA_LINK_IN(RODATA_REGION, ROMABLE_REGION)
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#include <zephyr/linker/common-rom/common-rom-cpp.ld>
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#include <zephyr/linker/common-rom/common-rom-kernel-devices.ld>
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#include <zephyr/linker/common-rom/common-rom-ztest.ld>
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#include <zephyr/linker/common-rom/common-rom-net.ld>
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#include <zephyr/linker/common-rom/common-rom-bt.ld>
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#include <zephyr/linker/common-rom/common-rom-debug.ld>
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#include <zephyr/linker/common-rom/common-rom-misc.ld>
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#include <zephyr/linker/thread-local-storage.ld>
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#include <snippets-sections.ld>
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/* Create an explicit section at the end of all the data that shall be mapped into drom.
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* This is used to calculate the size of the _image_drom_size variable */
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SECTION_PROLOGUE(_RODATA_SECTION_END,,ALIGN(0x10))
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/* RTC data section holds data marked with
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* RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
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*/
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.rtc.data :
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{
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_rodata_reserved_end = ABSOLUTE(.);
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. = ALIGN(16);
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_image_rodata_end = ABSOLUTE(.);
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} GROUP_DATA_LINK_IN(RODATA_REGION, ROMABLE_REGION)
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_rtc_data_start = ABSOLUTE(.);
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*(.rtc.data)
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*(.rtc.rodata)
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_rtc_data_end = ABSOLUTE(.);
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} GROUP_DATA_LINK_IN(rtc_slow_seg, ROMABLE_REGION)
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#if defined(CONFIG_ESP_SPIRAM)
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/* This section holds .ext_ram.bss data, and will be put in PSRAM */
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.ext_ram.bss (NOLOAD) :
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.rtc.bss (NOLOAD) :
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{
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_rtc_bss_start = ABSOLUTE(.);
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*(.rtc.data)
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*(.rtc.rodata)
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_rtc_bss_end = ABSOLUTE(.);
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} GROUP_LINK_IN(rtc_slow_seg)
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/* This section holds data that should not be initialized at power up
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* and will be retained during deep sleep.
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* User data marked with RTC_NOINIT_ATTR will be placed
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* into this section. See the file "esp_attr.h" for more information.
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*/
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.rtc_noinit (NOLOAD):
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{
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_ext_ram_data_start = ABSOLUTE(.);
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_ext_ram_bss_start = ABSOLUTE(.);
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*(.ext_ram.bss*)
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. = ALIGN(4);
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_ext_ram_bss_end = ABSOLUTE(.);
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} > ext_ram_seg
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_rtc_noinit_start = ABSOLUTE(.);
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*(.rtc_noinit .rtc_noinit.*)
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. = ALIGN(4) ;
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_rtc_noinit_end = ABSOLUTE(.);
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} GROUP_LINK_IN(rtc_slow_seg)
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.ext_ram_noinit (NOLOAD) :
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/* This section located in RTC SLOW Memory area.
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* It holds data marked with RTC_SLOW_ATTR attribute.
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* See the file "esp_attr.h" for more information.
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*/
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.rtc.force_slow :
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{
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#if defined(CONFIG_ESP32_WIFI_NET_ALLOC_SPIRAM)
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*libdrivers__wifi.a:(.noinit .noinit.*)
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*libsubsys__net__l2__ethernet.a:(.noinit .noinit.*)
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*libsubsys__net__lib__config.a:(.noinit .noinit.*)
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*libsubsys__net__ip.a:(.noinit .noinit.*)
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*libsubsys__net.a:(.noinit .noinit.*)
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#endif
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_spiram_heap_start = ABSOLUTE(.);
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. = . + CONFIG_ESP_SPIRAM_HEAP_SIZE;
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. = ALIGN(4);
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_rtc_force_slow_start = ABSOLUTE(.);
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*(.rtc.force_slow .rtc.force_slow.*)
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. = ALIGN(4) ;
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_rtc_force_slow_end = ABSOLUTE(.);
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} GROUP_DATA_LINK_IN(rtc_slow_seg, ROMABLE_REGION)
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_ext_ram_data_end = ABSOLUTE(.);
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} > ext_ram_seg
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#endif
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/* Get size of rtc slow data based on rtc_data_location alias */
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_rtc_slow_length = (_rtc_force_slow_end - _rtc_data_start);
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_rtc_fast_length = (_rtc_force_fast_end - _rtc_fast_start);
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ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)), "RTC_SLOW segment data does not fit.")
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ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)), "RTC_FAST segment data does not fit.")
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/* Send .iram0 code to iram */
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.iram0.vectors : ALIGN(4)
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@ -308,21 +281,14 @@ SECTIONS
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_iram_text_start = ABSOLUTE(.);
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*(.iram1 .iram1.*)
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*(.iram0.literal .iram.literal .iram.text.literal .iram0.text .iram.text)
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*libesp32.a:panic.*(.literal .text .literal.* .text.*)
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*librtc.a:(.literal .text .literal.* .text.*)
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*libarch__xtensa__core.a:(.literal .text .literal.* .text.*)
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*libkernel.a:(.literal .text .literal.* .text.*)
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*libsoc.a:rtc_*.*(.literal .text .literal.* .text.*)
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*libsoc.a:cpu_util.*(.literal .text .literal.* .text.*)
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*libgcc.a:lib2funcs.*(.literal .text .literal.* .text.*)
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*libzephyr.a:spiram*.*(.literal .text .literal.* .text.*)
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*libzephyr.a:spi_timing*.*(.literal .text .literal.* .text.*)
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*libzephyr.a:spi_flash*.*(.literal .text .literal.* .text.*)
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*libzephyr.a:cbprintf_packaged.*(.literal .text .literal.* .text.*)
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*libdrivers__flash.a:flash_esp32.*(.literal .text .literal.* .text.*)
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*libzephyr.a:windowspill_asm.*(.literal .text .literal.* .text.*)
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*libzephyr.a:log_noos.*(.literal .text .literal.* .text.*)
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*libdrivers__timer.a:xtensa_sys_timer.*(.literal .text .literal.* .text.*)
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*libzephyr.a:systimer_hal.*(.literal .text .literal.* .text.*)
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*libzephyr.a:log_core.*(.literal .text .literal.* .text.*)
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*libzephyr.a:cbprintf_complete.*(.literal .text .literal.* .text.*)
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*libzephyr.a:printk.*(.literal.printk .literal.vprintk .literal.char_out .text.printk .text.vprintk .text.char_out)
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@ -331,16 +297,107 @@ SECTIONS
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*libdrivers__console.a:uart_console.*(.literal.console_out .text.console_out)
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*libzephyr.a:log_output.*(.literal .text .literal.* .text.*)
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*libzephyr.a:log_backend_uart.*(.literal .text .literal.* .text.*)
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*libzephyr.a:log_minimal.*(.literal .literal.* .text .text.*)
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*libzephyr.a:loader.*(.literal .text .literal.* .text.*)
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*libzephyr.a:esp_mmu_map.*(.literal .literal.* .text .text.*)
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*libdrivers__interrupt_controller.a:(.literal .literal.* .text .text.*)
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*liblib__libc__minimal.a:string.*(.literal .text .literal.* .text.*)
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*liblib__libc__newlib.a:string.*(.literal .text .literal.* .text.*)
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*libc.a:*(.literal .text .literal.* .text.*)
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*liblib__libc__picolibc.a:string.*(.literal .text .literal.* .text.*)
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*libphy.a:(.phyiram .phyiram.*)
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*libgcov.a:(.literal .text .literal.* .text.*)
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/* [mapping:esp_psram] */
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*libzephyr.a:mmu_psram_flash.*(.literal .literal.* .text .text.*)
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*libzephyr.a:esp_psram_impl_quad.*(.literal .literal.* .text .text.*)
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*libzephyr.a:esp_psram_impl_octal.*(.literal .literal.* .text .text.*)
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/* [mapping:hal] */
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*libzephyr.a:mmu_hal.*(.literal .text .literal.* .text.*)
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*libzephyr.a:spi_flash_hal_iram.*(.literal .text .literal.* .text.*)
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*libzephyr.a:spi_flash_encrypt_hal_iram.*(.literal .text .literal.* .text.*)
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*libzephyr.a:cache_hal.*(.literal .text .literal.* .text.*)
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*libzephyr.a:ledc_hal_iram.*(.literal .text .literal.* .text.*)
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*libzephyr.a:i2c_hal_iram.*(.literal .text .literal.* .text.*)
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*libzephyr.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
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*libzephyr.a:systimer_hal.*(.literal .text .literal.* .text.*)
|
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*libzephyr.a:spi_flash_hal_gpspi.*(.literal .text .literal.* .text.*)
|
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|
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/* [mapping:soc] */
|
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*libzephyr.a:lldesc.*(.literal .literal.* .text .text.*)
|
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|
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/* [mapping:log] */
|
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*(.literal.esp_log_write .text.esp_log_write)
|
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*(.literal.esp_log_timestamp .text.esp_log_timestamp)
|
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*(.literal.esp_log_early_timestamp .text.esp_log_early_timestamp)
|
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*(.literal.esp_log_impl_lock .text.esp_log_impl_lock)
|
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*(.literal.esp_log_impl_lock_timeout .text.esp_log_impl_lock_timeout)
|
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*(.literal.esp_log_impl_unlock .text.esp_log_impl_unlock)
|
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|
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/* [mapping:spi_flash] */
|
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*libzephyr.a:spi_flash_chip_boya.*(.literal .literal.* .text .text.*)
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*libzephyr.a:spi_flash_chip_gd.*(.literal .literal.* .text .text.*)
|
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*libzephyr.a:spi_flash_chip_generic.*(.literal .literal.* .text .text.*)
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*libzephyr.a:spi_flash_chip_issi.*(.literal .literal.* .text .text.*)
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*libzephyr.a:spi_flash_chip_mxic.*(.literal .literal.* .text .text.*)
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*libzephyr.a:spi_flash_chip_mxic_opi.*(.literal .literal.* .text .text.*)
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*libzephyr.a:spi_flash_chip_th.*(.literal .literal.* .text .text.*)
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*libzephyr.a:spi_flash_chip_winbond.*(.literal .literal.* .text .text.*)
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*libzephyr.a:memspi_host_driver.*(.literal .literal.* .text .text.*)
|
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*libzephyr.a:flash_brownout_hook.*(.literal .literal.* .text .text.*)
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*libzephyr.a:spi_flash_wrap.*(.literal .literal.* .text .text.*)
|
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*libzephyr.a:spi_flash_hpm_enable.*(.literal .literal.* .text .text.*)
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*libzephyr.a:spi_flash_oct_flash_init*(.literal .literal.* .text .text.*)
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|
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/* [mapping:esp_system] */
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*libzephyr.a:esp_err.*(.literal .literal.* .text .text.*)
|
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*(.literal.esp_system_abort .text.esp_system_abort)
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||||
|
||||
/* [mapping:esp_hw_support] */
|
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*(.literal.esp_cpu_stall .text.esp_cpu_stall)
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*(.literal.esp_cpu_unstall .text.esp_cpu_unstall)
|
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*(.literal.esp_cpu_reset .text.esp_cpu_reset)
|
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*(.literal.esp_cpu_wait_for_intr .text.esp_cpu_wait_for_intr)
|
||||
*(.literal.esp_cpu_compare_and_set .text.esp_cpu_compare_and_set)
|
||||
*(.literal.esp_gpio_reserve_pins .text.esp_gpio_reserve_pins)
|
||||
*(.literal.esp_gpio_is_pin_reserved .text.esp_gpio_is_pin_reserved)
|
||||
*(.literal.rtc_vddsdio_get_config .text.rtc_vddsdio_get_config)
|
||||
*(.literal.rtc_vddsdio_set_config .text.rtc_vddsdio_set_config)
|
||||
*libzephyr.a:esp_memory_utils.*(.literal .literal.* .text .text.*)
|
||||
*libzephyr.a:rtc_clk.*(.literal .literal.* .text .text.*)
|
||||
*libzephyr.a:rtc_sleep.*(.literal .literal.* .text .text.*)
|
||||
*libzephyr.a:rtc_time.*(.literal .literal.* .text .text.*)
|
||||
*libzephyr.a:systimer.*(.literal .literal.* .text .text.*)
|
||||
*libzephyr.a:mspi_timing_config.*(.literal .literal.* .text .text.*)
|
||||
*libzephyr.a:mspi_timing_tuning.*(.literal .literal.* .text .text.*)
|
||||
*(.literal.sar_periph_ctrl_power_enable .text.sar_periph_ctrl_power_enable)
|
||||
|
||||
/* [mapping:soc_pm] */
|
||||
*(.literal.GPIO_HOLD_MASK .text.GPIO_HOLD_MASK)
|
||||
|
||||
/* [mapping:esp_rom] */
|
||||
*libzephyr.a:esp_rom_cache_esp32s2_esp32s3.*(.literal .literal.* .text .text.*)
|
||||
*libzephyr.a:esp_rom_cache_writeback_esp32s3.*(.literal .literal.* .text .text.*)
|
||||
*libzephyr.a:esp_rom_spiflash.*(.literal .literal.* .text .text.*)
|
||||
*libzephyr.a:esp_rom_systimer.*(.literal .literal.* .text .text.*)
|
||||
*libzephyr.a:esp_rom_wdt.*(.literal .literal.* .text .text.*)
|
||||
|
||||
/* [mapping:esp_mm] */
|
||||
*libzephyr.a:esp_cache.*(.literal .literal.* .text .text.*)
|
||||
|
||||
#if defined(CONFIG_ESP32_WIFI_IRAM_OPT)
|
||||
*libnet80211.a:( .wifi0iram .wifi0iram.* .wifislpiram .wifislpiram.*)
|
||||
*libpp.a:( .wifi0iram .wifi0iram.* .wifislpiram .wifislpiram.* .wifiorslpiram .wifiorslpiram.*)
|
||||
*libnet80211.a:(.wifi0iram .wifi0iram.* .wifislpiram .wifislpiram.*)
|
||||
*libpp.a:(.wifi0iram .wifi0iram.* .wifislpiram .wifislpiram.* .wifiorslpiram .wifiorslpiram.*)
|
||||
*libcoexist.a:(.wifi_slp_iram .wifi_slp_iram.*)
|
||||
|
||||
/* [mapping:esp_wifi] */
|
||||
*(.literal.wifi_clock_enable_wrapper .text.wifi_clock_enable_wrapper)
|
||||
*(.literal.wifi_clock_disable_wrapper .text.wifi_clock_disable_wrapper)
|
||||
|
||||
/* [mapping:esp_phy] */
|
||||
*(.literal.esp_phy_enable .text.esp_phy_enable)
|
||||
*(.literal.esp_phy_disable .text.esp_phy_disable)
|
||||
*(.literal.esp_wifi_bt_power_domain_off .text.esp_wifi_bt_power_domain_off)
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ESP32_WIFI_RX_IRAM_OPT)
|
||||
|
|
@ -352,49 +409,190 @@ SECTIONS
|
|||
|
||||
} GROUP_DATA_LINK_IN(IRAM_REGION, ROMABLE_REGION)
|
||||
|
||||
/* Marks the end of IRAM code segment */
|
||||
.iram0.text_end (NOLOAD) :
|
||||
{
|
||||
/* ESP32-S3 memprot requires 16B padding for possible CPU
|
||||
* prefetch and 256B alignment for PMS split lines */
|
||||
. = ALIGN(16);
|
||||
_iram_text_end = ABSOLUTE(.);
|
||||
} GROUP_LINK_IN(IRAM_REGION)
|
||||
|
||||
.iram0.data :
|
||||
{
|
||||
. = ALIGN(16);
|
||||
*(.iram.data)
|
||||
*(.iram.data*)
|
||||
} GROUP_DATA_LINK_IN(IRAM_REGION, ROMABLE_REGION)
|
||||
|
||||
.iram0.bss (NOLOAD) :
|
||||
{
|
||||
. = ALIGN(16);
|
||||
*(.iram.bss)
|
||||
*(.iram.bss*)
|
||||
|
||||
. = ALIGN(16);
|
||||
_iram_end = ABSOLUTE(.);
|
||||
} GROUP_LINK_IN(IRAM_REGION)
|
||||
|
||||
|
||||
/* This section is required to skip .iram0.text area because iram0_0_seg and
|
||||
/**
|
||||
* This section is required to skip .iram0.text area because iram0_0_seg and
|
||||
* dram0_0_seg reflect the same address space on different buses.
|
||||
*/
|
||||
.dram0.dummy (NOLOAD):
|
||||
{
|
||||
. = ALIGN (8);
|
||||
. = ORIGIN(dram0_0_seg) + MAX(_iram_end, SRAM_DIRAM_I_START) - SRAM_DIRAM_I_START;
|
||||
} GROUP_LINK_IN(RAMABLE_REGION)
|
||||
|
||||
/* Shared RAM */
|
||||
SECTION_DATA_PROLOGUE(_BSS_SECTION_NAME,(NOLOAD),)
|
||||
.dram0.data :
|
||||
{
|
||||
. = ALIGN (8);
|
||||
__data_start = ABSOLUTE(.);
|
||||
_image_ram_start = ABSOLUTE(.);
|
||||
/* bluetooth library requires this symbol to be defined */
|
||||
_btdm_data_start = ABSOLUTE(.);
|
||||
*libbtdm_app.a:(.data .data.*)
|
||||
. = ALIGN (4);
|
||||
_btdm_data_end = ABSOLUTE(.);
|
||||
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
*(.data1)
|
||||
*(.sdata)
|
||||
*(.sdata.*)
|
||||
*(.gnu.linkonce.s.*)
|
||||
*(.sdata2)
|
||||
*(.sdata2.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
*(.srodata)
|
||||
*(.srodata.*)
|
||||
/* rodata for panic handler(libarch__xtensa__core.a) and all
|
||||
* dependent functions should be placed in DRAM to avoid issue
|
||||
* when flash cache is disabled */
|
||||
*libarch__xtensa__core.a:(.rodata .rodata.*)
|
||||
*libkernel.a:fatal.*(.rodata .rodata.*)
|
||||
*libkernel.a:init.*(.rodata .rodata.*)
|
||||
*libzephyr.a:cbprintf_complete.*(.rodata .rodata.*)
|
||||
*libzephyr.a:log_core.*(.rodata .rodata.*)
|
||||
*libzephyr.a:log_backend_uart.*(.rodata .rodata.*)
|
||||
*libzephyr.a:log_output.*(.rodata .rodata.*)
|
||||
*libzephyr.a:log_minimal.*(.rodata .rodata.*)
|
||||
*libzephyr.a:loader.*(.rodata .rodata.*)
|
||||
*libdrivers__serial.a:uart_esp32.*(.rodata .rodata.*)
|
||||
*libdrivers__flash.a:flash_esp32.*(.rodata .rodata.*)
|
||||
*libzephyr.a:esp_mmu_map.*(.rodata .rodata.*)
|
||||
*libdrivers__interrupt_controller.a:(.rodata .rodata.*)
|
||||
|
||||
/* [mapping:esp_psram] */
|
||||
*libzephyr.a:mmu_psram_flash.*(.rodata .rodata.*)
|
||||
*libzephyr.a:esp_psram_impl_octal.*(.rodata .rodata.*)
|
||||
*libzephyr.a:esp_psram_impl_quad.*(.rodata .rodata.*)
|
||||
|
||||
/* [mapping:hal] */
|
||||
*libzephyr.a:mmu_hal.*(.rodata .rodata.*)
|
||||
*libzephyr.a:spi_flash_hal_iram.*(.rodata .rodata.*)
|
||||
*libzephyr.a:spi_flash_encrypt_hal_iram.*(.rodata .rodata.*)
|
||||
*libzephyr.a:cache_hal.*(.rodata .rodata.*)
|
||||
*libzephyr.a:ledc_hal_iram.*(.rodata .rodata.*)
|
||||
*libzephyr.a:i2c_hal_iram.*(.rodata .rodata.*)
|
||||
*libzephyr.a:wdt_hal_iram.*(.rodata .rodata.*)
|
||||
*libzephyr.a:systimer_hal.*(.rodata .rodata.*)
|
||||
*libzephyr.a:spi_flash_hal_gpspi.*(.rodata .rodata.*)
|
||||
|
||||
/* [mapping:soc] */
|
||||
*libzephyr.a:lldesc.*(.rodata .rodata.*)
|
||||
|
||||
/* [mapping:log] */
|
||||
*(.rodata.esp_log_write)
|
||||
*(.rodata.esp_log_timestamp)
|
||||
*(.rodata.esp_log_early_timestamp)
|
||||
*(.rodata.esp_log_impl_lock)
|
||||
*(.rodata.esp_log_impl_lock_timeout)
|
||||
*(.rodata.esp_log_impl_unlock)
|
||||
|
||||
/* [mapping:spi_flash] */
|
||||
*libzephyr.a:spi_flash_chip_boya.*(.rodata .rodata.*)
|
||||
*libzephyr.a:spi_flash_chip_gd.*(.rodata .rodata.*)
|
||||
*libzephyr.a:spi_flash_chip_generic.*(.rodata .rodata.*)
|
||||
*libzephyr.a:spi_flash_chip_issi.*(.rodata .rodata.*)
|
||||
*libzephyr.a:spi_flash_chip_mxic.*(.rodata .rodata.*)
|
||||
*libzephyr.a:spi_flash_chip_mxic_opi.*(.rodata .rodata.*)
|
||||
*libzephyr.a:spi_flash_chip_th.*(.rodata .rodata.*)
|
||||
*libzephyr.a:spi_flash_chip_winbond.*(.rodata .rodata.*)
|
||||
*libzephyr.a:memspi_host_driver.*(.rodata .rodata.*)
|
||||
*libzephyr.a:flash_brownout_hook.*(.rodata .rodata.*)
|
||||
*libzephyr.a:spi_flash_wrap.*(.rodata .rodata.*)
|
||||
*libzephyr.a:spi_flash_hpm_enable.*(.rodata .rodata.*)
|
||||
*libzephyr.a:spi_flash_oct_flash_init.*(.rodata .rodata.*)
|
||||
|
||||
/* [mapping:esp_mm] */
|
||||
*libzephyr.a:esp_cache.*(.rodata .rodata.*)
|
||||
|
||||
/* [mapping:esp_hw_support] */
|
||||
*(.rodata.esp_cpu_stall)
|
||||
*(.rodata.esp_cpu_unstall)
|
||||
*(.rodata.esp_cpu_reset)
|
||||
*(.rodata.esp_cpu_wait_for_intr)
|
||||
*(.rodata.esp_cpu_compare_and_set)
|
||||
*(.rodata.esp_gpio_reserve_pins)
|
||||
*(.rodata.esp_gpio_is_pin_reserved)
|
||||
*(.rodata.rtc_vddsdio_get_config)
|
||||
*(.rodata.rtc_vddsdio_set_config)
|
||||
*libzephyr.a:esp_memory_utils.*(.rodata .rodata.*)
|
||||
*libzephyr.a:rtc_clk.*(.rodata .rodata.*)
|
||||
*libzephyr.a:systimer.*(.rodata .rodata.*)
|
||||
*libzephyr.a:mspi_timing_config.*(.rodata .rodata.*)
|
||||
*libzephyr.a:mspi_timing_tuning.*(.rodata .rodata.*)
|
||||
*(.rodata.sar_periph_ctrl_power_enable)
|
||||
|
||||
/* [mapping:soc_pm] */
|
||||
*(.rodata.GPIO_HOLD_MASK)
|
||||
|
||||
/* [mapping:esp_rom] */
|
||||
*libzephyr.a:esp_rom_cache_esp32s2_esp32s3.*(.rodata .rodata.*)
|
||||
*libzephyr.a:esp_rom_cache_writeback_esp32s3.*(.rodata .rodata.*)
|
||||
*libzephyr.a:esp_rom_spiflash.*(.rodata .rodata.*)
|
||||
*libzephyr.a:esp_rom_systimer.*(.rodata .rodata.*)
|
||||
*libzephyr.a:esp_rom_wdt.*(.rodata .rodata.*)
|
||||
|
||||
/* [mapping:esp_system] */
|
||||
*libzephyr.a:esp_err.*(.rodata .rodata.*)
|
||||
*(.rodata.esp_system_abort)
|
||||
|
||||
#if defined(CONFIG_ESP32_WIFI_IRAM_OPT)
|
||||
/* [mapping:esp_wifi] */
|
||||
*(.rodata.wifi_clock_enable_wrapper)
|
||||
*(.rodata.wifi_clock_disable_wrapper)
|
||||
|
||||
/* [mapping:esp_phy] */
|
||||
*(.rodata.esp_phy_enable)
|
||||
*(.rodata.esp_phy_disable)
|
||||
*(.rodata.esp_wifi_bt_power_domain_off)
|
||||
#endif
|
||||
|
||||
KEEP(*(.jcr))
|
||||
*(.dram1 .dram1.*)
|
||||
. = ALIGN(4);
|
||||
} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
|
||||
|
||||
#include <zephyr/linker/cplusplus-rom.ld>
|
||||
#include <snippets-data-sections.ld>
|
||||
#include <zephyr/linker/common-ram.ld>
|
||||
#include <snippets-ram-sections.ld>
|
||||
#include <zephyr/linker/cplusplus-ram.ld>
|
||||
#include <zephyr/linker/kobject-data.ld>
|
||||
|
||||
/* logging sections should be placed in RAM area to avoid flash cache disabled issues */
|
||||
#pragma push_macro("GROUP_ROM_LINK_IN")
|
||||
#undef GROUP_ROM_LINK_IN
|
||||
#define GROUP_ROM_LINK_IN GROUP_DATA_LINK_IN
|
||||
#include <zephyr/linker/common-rom/common-rom-logging.ld>
|
||||
#pragma pop_macro("GROUP_ROM_LINK_IN")
|
||||
|
||||
.dram0.end :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
#include <snippets-rwdata.ld>
|
||||
. = ALIGN(4);
|
||||
__data_end = ABSOLUTE(.);
|
||||
} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
|
||||
|
||||
.noinit (NOLOAD):
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.noinit)
|
||||
*(.noinit.*)
|
||||
. = ALIGN(4) ;
|
||||
} GROUP_LINK_IN(RAMABLE_REGION)
|
||||
|
||||
/* Shared RAM */
|
||||
.dram0.bss (NOLOAD) :
|
||||
{
|
||||
. = ALIGN (8);
|
||||
_bss_start = ABSOLUTE(.); /* required by bluetooth library */
|
||||
__bss_start = ABSOLUTE(.);
|
||||
|
||||
/* bluetooth library requires this symbol to be defined */
|
||||
_btdm_bss_start = ABSOLUTE(.);
|
||||
*libbtdm_app.a:(.bss .bss.* COMMON)
|
||||
. = ALIGN (4);
|
||||
_btdm_bss_end = ABSOLUTE(.);
|
||||
|
||||
*(.dynsbss)
|
||||
*(.sbss)
|
||||
*(.sbss.*)
|
||||
|
|
@ -413,93 +611,24 @@ SECTIONS
|
|||
__bss_end = ABSOLUTE(.);
|
||||
} GROUP_LINK_IN(RAMABLE_REGION)
|
||||
|
||||
#include <zephyr/linker/ram-end.ld>
|
||||
|
||||
ASSERT(((__bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), "DRAM segment data does not fit.")
|
||||
|
||||
SECTION_DATA_PROLOGUE(_NOINIT_SECTION_NAME, (NOLOAD),)
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.noinit)
|
||||
*(.noinit.*)
|
||||
. = ALIGN(8) ;
|
||||
} GROUP_LINK_IN(RAMABLE_REGION)
|
||||
|
||||
.dram0.data :
|
||||
{
|
||||
. = ALIGN (8);
|
||||
__data_start = ABSOLUTE(.);
|
||||
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
*(.data1)
|
||||
*(.sdata)
|
||||
*(.sdata.*)
|
||||
*(.gnu.linkonce.s.*)
|
||||
*(.sdata2)
|
||||
*(.sdata2.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
/* rodata for panic handler(libarch__xtensa__core.a) and all
|
||||
* dependent functions should be placed in DRAM to avoid issue
|
||||
* when flash cache is disabled */
|
||||
*libarch__xtensa__core.a:(.rodata .rodata.*)
|
||||
*libkernel.a:fatal.*(.rodata .rodata.*)
|
||||
*libkernel.a:init.*(.rodata .rodata.*)
|
||||
*libzephyr.a:cbprintf_complete*(.rodata .rodata.*)
|
||||
*libzephyr.a:systimer_hal.*(.rodata .rodata.*)
|
||||
*libzephyr.a:log_core.*(.rodata .rodata.*)
|
||||
*libzephyr.a:log_backend_uart.*(.rodata .rodata.*)
|
||||
*libzephyr.a:log_output.*(.rodata .rodata.*)
|
||||
*libzephyr.a:loader.*(.rodata .rodata.*)
|
||||
*libdrivers__serial.a:uart_esp32.*(.rodata .rodata.*)
|
||||
*libdrivers__flash.a:flash_esp32.*(.rodata .rodata.*)
|
||||
|
||||
KEEP(*(.jcr))
|
||||
*(.dram1 .dram1.*)
|
||||
. = ALIGN(4);
|
||||
} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
|
||||
|
||||
#include <zephyr/linker/cplusplus-rom.ld>
|
||||
#include <snippets-data-sections.ld>
|
||||
#include <zephyr/linker/common-ram.ld>
|
||||
#include <snippets-ram-sections.ld>
|
||||
#include <zephyr/linker/cplusplus-ram.ld>
|
||||
|
||||
/* logging sections should be placed in RAM area to avoid flash cache disabled issues */
|
||||
#pragma push_macro("GROUP_ROM_LINK_IN")
|
||||
#undef GROUP_ROM_LINK_IN
|
||||
#define GROUP_ROM_LINK_IN GROUP_DATA_LINK_IN
|
||||
#include <zephyr/linker/common-rom/common-rom-logging.ld>
|
||||
#pragma pop_macro("GROUP_ROM_LINK_IN")
|
||||
|
||||
.dram0.end :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
|
||||
#include <snippets-rwdata.ld>
|
||||
|
||||
. = ALIGN(4);
|
||||
_end = ABSOLUTE(.);
|
||||
__data_end = ABSOLUTE(.);
|
||||
} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
|
||||
|
||||
_image_irom_start = LOADADDR(.flash.text);
|
||||
_image_irom_size = LOADADDR(.flash.text) + SIZEOF(.flash.text) - _image_irom_start;
|
||||
_image_irom_vaddr = ADDR(.flash.text);
|
||||
|
||||
.flash_text_dummy (NOLOAD): ALIGN(IROM_SEG_ALIGN)
|
||||
{
|
||||
. = SIZEOF(_RODATA_SECTION_NAME);
|
||||
. = ALIGN(IROM_SEG_ALIGN) + 0x20;
|
||||
} GROUP_LINK_IN(FLASH_CODE_REGION)
|
||||
|
||||
.flash.text : ALIGN(IROM_SEG_ALIGN)
|
||||
{
|
||||
_stext = .;
|
||||
_instruction_reserved_start = ABSOLUTE(.);
|
||||
_text_start = ABSOLUTE(.);
|
||||
|
||||
#if !defined(CONFIG_ESP32_WIFI_IRAM_OPT)
|
||||
*libnet80211.a:( .wifi0iram .wifi0iram.* .wifislpiram .wifislpiram.*)
|
||||
*libpp.a:( .wifi0iram .wifi0iram.* .wifislpiram .wifislpiram.* .wifiorslpiram .wifiorslpiram.*)
|
||||
|
||||
#endif
|
||||
|
||||
#if !defined(CONFIG_ESP32_WIFI_RX_IRAM_OPT)
|
||||
|
|
@ -522,6 +651,7 @@ SECTIONS
|
|||
. += 16;
|
||||
|
||||
_text_end = ABSOLUTE(.);
|
||||
_instruction_reserved_end = ABSOLUTE(.); /* This is a symbol marking the flash.text end, this can be used for mmu driver to maintain virtual address */
|
||||
_etext = .;
|
||||
|
||||
/* Similar to _iram_start, this symbol goes here so it is
|
||||
|
|
@ -531,114 +661,154 @@ SECTIONS
|
|||
_flash_cache_start = ABSOLUTE(0);
|
||||
} GROUP_DATA_LINK_IN(FLASH_CODE_REGION, ROMABLE_REGION)
|
||||
|
||||
/* RTC fast memory holds RTC wake stub code,
|
||||
* including from any source file named rtc_wake_stub*.c
|
||||
/**
|
||||
* This dummy section represents the .flash.text section but in default_rodata_seg.
|
||||
* Thus, it must have its alignment and (at least) its size.
|
||||
*/
|
||||
.rtc.text :
|
||||
.flash_rodata_dummy (NOLOAD):
|
||||
{
|
||||
_flash_rodata_dummy_start = ABSOLUTE(.);
|
||||
/* Start at the same alignment constraint than .flash.text */
|
||||
. = ALIGN(ALIGNOF(.flash.text));
|
||||
/* Create an empty gap as big as .flash.text section */
|
||||
. = . + SIZEOF(.flash.text);
|
||||
/* Prepare the alignment of the section above. Few bytes (0x20) must be
|
||||
* added for the mapping header. */
|
||||
. = ALIGN(_esp_mmu_block_size) + 0x40;
|
||||
} GROUP_LINK_IN(RODATA_REGION)
|
||||
|
||||
_image_drom_start = LOADADDR(.flash.rodata);
|
||||
_image_drom_size = LOADADDR(.flash.rodata_end) + SIZEOF(.flash.rodata_end) - _image_drom_start;
|
||||
_image_drom_vaddr = ADDR(.flash.rodata);
|
||||
|
||||
.flash.rodata : ALIGN(IROM_SEG_ALIGN)
|
||||
{
|
||||
_flash_rodata_start = ABSOLUTE(.);
|
||||
_rodata_reserved_start = ABSOLUTE(.); /* This is a symbol marking the flash.rodata start, this can be used for mmu driver to maintain virtual address */
|
||||
_rodata_start = ABSOLUTE(.);
|
||||
__rodata_region_start = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
#include <snippets-rodata.ld>
|
||||
|
||||
*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
|
||||
*(.gnu.linkonce.r.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.rodata1)
|
||||
__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
|
||||
*(.xt_except_table)
|
||||
*(.gcc_except_table .gcc_except_table.*)
|
||||
*(.gnu.linkonce.e.*)
|
||||
*(.gnu.version_r)
|
||||
. = (. + 3) & ~ 3;
|
||||
__eh_frame = ABSOLUTE(.);
|
||||
KEEP(*(.eh_frame))
|
||||
. = (. + 7) & ~ 3;
|
||||
|
||||
/* C++ exception handlers table: */
|
||||
__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
|
||||
*(.xt_except_desc)
|
||||
*(.gnu.linkonce.h.*)
|
||||
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
|
||||
*(.xt_except_desc_end)
|
||||
*(.dynamic)
|
||||
*(.gnu.version_d)
|
||||
. = ALIGN(4);
|
||||
__rodata_region_end = ABSOLUTE(.);
|
||||
/* Literals are also RO data. */
|
||||
_lit4_start = ABSOLUTE(.);
|
||||
*(*.lit4)
|
||||
*(.lit4.*)
|
||||
*(.gnu.linkonce.lit4.*)
|
||||
_lit4_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
*(.rodata_wlog)
|
||||
*(.rodata_wlog*)
|
||||
. = ALIGN(4);
|
||||
} GROUP_DATA_LINK_IN(RODATA_REGION, ROMABLE_REGION)
|
||||
|
||||
#include <zephyr/linker/common-rom/common-rom-cpp.ld>
|
||||
#include <zephyr/linker/common-rom/common-rom-kernel-devices.ld>
|
||||
#include <zephyr/linker/common-rom/common-rom-ztest.ld>
|
||||
#include <zephyr/linker/common-rom/common-rom-net.ld>
|
||||
#include <zephyr/linker/common-rom/common-rom-bt.ld>
|
||||
#include <zephyr/linker/common-rom/common-rom-debug.ld>
|
||||
#include <zephyr/linker/common-rom/common-rom-misc.ld>
|
||||
#include <zephyr/linker/thread-local-storage.ld>
|
||||
#include <snippets-sections.ld>
|
||||
|
||||
/* Create an explicit section at the end of all the data that shall be mapped into drom.
|
||||
* This is used to calculate the size of the _image_drom_size variable */
|
||||
.flash.rodata_end : ALIGN(0x10)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_rtc_text_start = ABSOLUTE(.);
|
||||
*(.rtc.literal .rtc.text)
|
||||
*(.rtc.entry.text)
|
||||
*rtc_wake_stub*.*(.literal .text .literal.* .text.*)
|
||||
_rtc_text_end = ABSOLUTE(.);
|
||||
} GROUP_DATA_LINK_IN(rtc_iram_seg, ROMABLE_REGION)
|
||||
_rodata_reserved_end = ABSOLUTE(.);
|
||||
_image_rodata_end = ABSOLUTE(.);
|
||||
} GROUP_DATA_LINK_IN(RODATA_REGION, ROMABLE_REGION)
|
||||
|
||||
/* This section is required to skip rtc.text area because rtc_iram_seg and
|
||||
* rtc_data_seg are reflect the same address space on different buses.
|
||||
/**
|
||||
* This section is required to skip flash rodata sections, because `ext_ram_seg`
|
||||
* and `drom0_0_seg` are on the same bus
|
||||
*/
|
||||
.rtc.dummy :
|
||||
#if defined(CONFIG_ESP_SPIRAM)
|
||||
|
||||
.ext_ram.dummy (NOLOAD):
|
||||
{
|
||||
_rtc_dummy_start = ABSOLUTE(.);
|
||||
_rtc_fast_start = ABSOLUTE(.);
|
||||
. = SIZEOF(.rtc.text);
|
||||
_rtc_dummy_end = ABSOLUTE(.);
|
||||
} GROUP_DATA_LINK_IN(rtc_data_seg, ROMABLE_REGION)
|
||||
. = ORIGIN(ext_ram_seg) + (_rodata_reserved_end - _flash_rodata_dummy_start);
|
||||
. = ALIGN (0x10000);
|
||||
} GROUP_LINK_IN(ext_ram_seg)
|
||||
|
||||
/* This section located in RTC FAST Memory area.
|
||||
* It holds data marked with RTC_FAST_ATTR attribute.
|
||||
* See the file "esp_attr.h" for more information.
|
||||
*/
|
||||
.rtc.force_fast :
|
||||
/* This section holds .ext_ram.bss data, and will be put in PSRAM */
|
||||
.ext_ram.bss (NOLOAD) :
|
||||
{
|
||||
_ext_ram_bss_start = ABSOLUTE(.);
|
||||
*(.ext_ram.bss*)
|
||||
. = ALIGN(4);
|
||||
|
||||
_spiram_heap_start = ABSOLUTE(.);
|
||||
. = . + CONFIG_ESP_SPIRAM_HEAP_SIZE - (_spiram_heap_start - _ext_ram_bss_start);
|
||||
. = ALIGN(4);
|
||||
|
||||
_ext_ram_bss_end = ABSOLUTE(.);
|
||||
} GROUP_LINK_IN(ext_ram_seg)
|
||||
|
||||
#endif /* CONFIG_ESP_SPIRAM */
|
||||
|
||||
/* Marks the end of IRAM code segment */
|
||||
.iram0.text_end (NOLOAD) :
|
||||
{
|
||||
/* ESP32-S3 memprot requires 16B padding for possible CPU prefetch and 256B alignment for PMS split lines */
|
||||
. += 16;
|
||||
_iram_text_end = ABSOLUTE(.);
|
||||
} GROUP_LINK_IN(IRAM_REGION)
|
||||
|
||||
.iram0.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_rtc_force_fast_start = ABSOLUTE(.);
|
||||
_iram_data_start = ABSOLUTE(.);
|
||||
*(.iram.data)
|
||||
*(.iram.data*)
|
||||
_iram_data_end = ABSOLUTE(.);
|
||||
} GROUP_DATA_LINK_IN(IRAM_REGION, ROMABLE_REGION)
|
||||
|
||||
*(.rtc.force_fast .rtc.force_fast.*)
|
||||
. = ALIGN(4) ;
|
||||
_rtc_force_fast_end = ABSOLUTE(.);
|
||||
} GROUP_DATA_LINK_IN(rtc_data_seg, ROMABLE_REGION)
|
||||
|
||||
/* RTC data section holds RTC wake stub
|
||||
* data/rodata, including from any source file
|
||||
* named rtc_wake_stub*.c and the data marked with
|
||||
* RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
|
||||
*/
|
||||
.rtc.data :
|
||||
{
|
||||
_rtc_data_start = ABSOLUTE(.);
|
||||
*(.rtc.data)
|
||||
*(.rtc.rodata)
|
||||
*rtc_wake_stub*.o(.data .rodata .data.* .rodata.* .bss .bss.*)
|
||||
_rtc_data_end = ABSOLUTE(.);
|
||||
} GROUP_DATA_LINK_IN(rtc_slow_seg, ROMABLE_REGION)
|
||||
|
||||
/* RTC bss, from any source file named rtc_wake_stub*.c */
|
||||
.rtc.bss (NOLOAD) :
|
||||
{
|
||||
_rtc_bss_start = ABSOLUTE(.);
|
||||
*rtc_wake_stub*.*(.bss .bss.*)
|
||||
*rtc_wake_stub*.*(COMMON)
|
||||
|
||||
*(.rtc.data)
|
||||
*(.rtc.rodata)
|
||||
|
||||
_rtc_bss_end = ABSOLUTE(.);
|
||||
} GROUP_DATA_LINK_IN(rtc_slow_seg, ROMABLE_REGION)
|
||||
|
||||
/* RTC bss, from any source file named rtc_wake_stub*.c */
|
||||
.rtc.bss (NOLOAD) :
|
||||
{
|
||||
_rtc_bss_start = ABSOLUTE(.);
|
||||
*rtc_wake_stub*.*(.bss .bss.*)
|
||||
*rtc_wake_stub*.*(COMMON)
|
||||
|
||||
_rtc_bss_end = ABSOLUTE(.);
|
||||
} GROUP_DATA_LINK_IN(rtc_slow_seg, ROMABLE_REGION)
|
||||
|
||||
/* This section holds data that should not be initialized at power up
|
||||
* and will be retained during deep sleep.
|
||||
* User data marked with RTC_NOINIT_ATTR will be placed
|
||||
* into this section. See the file "esp_attr.h" for more information.
|
||||
*/
|
||||
.rtc_noinit (NOLOAD):
|
||||
.iram0.bss (NOLOAD) :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_rtc_noinit_start = ABSOLUTE(.);
|
||||
*(.rtc_noinit .rtc_noinit.*)
|
||||
. = ALIGN(4) ;
|
||||
_rtc_noinit_end = ABSOLUTE(.);
|
||||
} GROUP_DATA_LINK_IN(rtc_slow_seg, ROMABLE_REGION)
|
||||
|
||||
/* This section located in RTC SLOW Memory area.
|
||||
* It holds data marked with RTC_SLOW_ATTR attribute.
|
||||
* See the file "esp_attr.h" for more information.
|
||||
*/
|
||||
.rtc.force_slow :
|
||||
{
|
||||
_iram_bss_start = ABSOLUTE(.);
|
||||
*(.iram.bss)
|
||||
*(.iram.bss*)
|
||||
_iram_bss_end = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
_rtc_force_slow_start = ABSOLUTE(.);
|
||||
*(.rtc.force_slow .rtc.force_slow.*)
|
||||
. = ALIGN(4) ;
|
||||
_rtc_force_slow_end = ABSOLUTE(.);
|
||||
} GROUP_DATA_LINK_IN(rtc_slow_seg, ROMABLE_REGION)
|
||||
_iram_end = ABSOLUTE(.);
|
||||
} GROUP_LINK_IN(IRAM_REGION)
|
||||
|
||||
/* Get size of rtc slow data based on rtc_data_location alias */
|
||||
_rtc_slow_length = (_rtc_force_slow_end - _rtc_data_start);
|
||||
_rtc_fast_length = (_rtc_force_fast_end - _rtc_fast_start);
|
||||
|
||||
ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)), "RTC_SLOW segment data does not fit.")
|
||||
ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)), "RTC_FAST segment data does not fit.")
|
||||
/* Marks the end of data, bss and possibly rodata */
|
||||
.dram0.heap_start (NOLOAD) :
|
||||
{
|
||||
. = ALIGN (8);
|
||||
/* Lowest possible start address for the heap */
|
||||
_heap_start = ABSOLUTE(.);
|
||||
} GROUP_LINK_IN(RAMABLE_REGION)
|
||||
|
||||
#ifdef CONFIG_GEN_ISR_TABLES
|
||||
#include <zephyr/linker/intlist.ld>
|
||||
|
|
@ -687,7 +857,10 @@ _heap_sentry = 0x3fceb910;
|
|||
ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
|
||||
"IRAM0 segment data does not fit.")
|
||||
|
||||
ASSERT(((_heap_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
|
||||
"DRAM segment data does not fit.")
|
||||
|
||||
#if defined(CONFIG_ESP_SPIRAM)
|
||||
ASSERT(((_ext_ram_data_end - _ext_ram_data_start) <= CONFIG_ESP_SPIRAM_SIZE),
|
||||
ASSERT(((_ext_ram_bss_end - _ext_ram_bss_start) <= CONFIG_ESP_SPIRAM_SIZE),
|
||||
"External SPIRAM overflowed.")
|
||||
#endif /* CONFIG_ESP_SPIRAM */
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue