boards: frdm_mcxn947: Add support for the QSPI flash
Add support for the QSPI flash connected over FlexSPI Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
This commit is contained in:
parent
b0dbd9a87e
commit
517753e475
5 changed files with 77 additions and 0 deletions
|
@ -6,6 +6,7 @@
|
|||
#include <zephyr/device.h>
|
||||
#include <fsl_clock.h>
|
||||
#include <fsl_spc.h>
|
||||
#include <soc.h>
|
||||
|
||||
/* Board xtal frequency in Hz */
|
||||
#define BOARD_XTAL0_CLK_HZ 24000000U
|
||||
|
@ -66,6 +67,13 @@ static int frdm_mcxn947_init(void)
|
|||
/* Enable FRO HF(48MHz) output */
|
||||
CLOCK_SetupFROHFClocking(48000000U);
|
||||
|
||||
#ifdef CONFIG_FLASH_MCUX_FLEXSPI_XIP
|
||||
/* Call function flexspi_clock_safe_config() to move FleXSPI clock to a stable
|
||||
* clock source when updating the PLL if in XIP (execute code from FlexSPI memory
|
||||
*/
|
||||
flexspi_clock_safe_config();
|
||||
#endif
|
||||
|
||||
/* Set up PLL0 */
|
||||
const pll_setup_t pll0Setup = {
|
||||
.pllctrl = SCG_APLLCTRL_SOURCE(1U) | SCG_APLLCTRL_SELI(27U) |
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue