diff --git a/boards/nxp/frdm_mcxn947/board.c b/boards/nxp/frdm_mcxn947/board.c
index 40b3d42fc74..f43964fee6e 100644
--- a/boards/nxp/frdm_mcxn947/board.c
+++ b/boards/nxp/frdm_mcxn947/board.c
@@ -6,6 +6,7 @@
 #include <zephyr/device.h>
 #include <fsl_clock.h>
 #include <fsl_spc.h>
+#include <soc.h>
 
 /* Board xtal frequency in Hz */
 #define BOARD_XTAL0_CLK_HZ                        24000000U
@@ -66,6 +67,13 @@ static int frdm_mcxn947_init(void)
 	/* Enable FRO HF(48MHz) output */
 	CLOCK_SetupFROHFClocking(48000000U);
 
+#ifdef CONFIG_FLASH_MCUX_FLEXSPI_XIP
+	/* Call function flexspi_clock_safe_config() to move FleXSPI clock to a stable
+	 * clock source when updating the PLL if in XIP (execute code from FlexSPI memory
+	 */
+	flexspi_clock_safe_config();
+#endif
+
 	/* Set up PLL0 */
 	const pll_setup_t pll0Setup = {
 		.pllctrl = SCG_APLLCTRL_SOURCE(1U) | SCG_APLLCTRL_SELI(27U) |
diff --git a/boards/nxp/frdm_mcxn947/doc/index.rst b/boards/nxp/frdm_mcxn947/doc/index.rst
index 171e49eca43..1edcf7c6417 100644
--- a/boards/nxp/frdm_mcxn947/doc/index.rst
+++ b/boards/nxp/frdm_mcxn947/doc/index.rst
@@ -63,6 +63,8 @@ The FRDM-MCXN947 board configuration supports the following hardware features:
 +-----------+------------+-------------------------------------+
 | FLASH     | on-chip    | soc flash                           |
 +-----------+------------+-------------------------------------+
+| FLEXSPI   | on-chip    | flash programming                   |
++-----------+------------+-------------------------------------+
 
 Targets available
 ==================
diff --git a/boards/nxp/frdm_mcxn947/frdm_mcxn947-pinctrl.dtsi b/boards/nxp/frdm_mcxn947/frdm_mcxn947-pinctrl.dtsi
index f9d6e6d36ae..20da3d13273 100644
--- a/boards/nxp/frdm_mcxn947/frdm_mcxn947-pinctrl.dtsi
+++ b/boards/nxp/frdm_mcxn947/frdm_mcxn947-pinctrl.dtsi
@@ -16,4 +16,25 @@
 			input-enable;
 		};
 	};
+
+	pinmux_flexspi: pinmux_flexspi {
+		group0 {
+			pinmux = <FLEXSPI0_A_SS0_b_PIO3_0>,
+					<FLEXSPI0_A_SCLK_PIO3_7>,
+					<FLEXSPI0_A_DQS_PIO3_6>,
+					<FLEXSPI0_A_DATA0_PIO3_8>,
+					<FLEXSPI0_A_DATA1_PIO3_9>;
+			input-enable;
+			slew-rate = "fast";
+			drive-strength = "low";
+		};
+		group1 {
+			pinmux = <FLEXSPI0_A_DATA2_PIO3_10>,
+					<FLEXSPI0_A_DATA3_PIO3_11>;
+			input-enable;
+			slew-rate = "fast";
+			drive-strength = "low";
+			bias-pull-up;
+		};
+	};
 };
diff --git a/boards/nxp/frdm_mcxn947/frdm_mcxn947.dtsi b/boards/nxp/frdm_mcxn947/frdm_mcxn947.dtsi
index 97b140c14dc..b0b6304c1f6 100644
--- a/boards/nxp/frdm_mcxn947/frdm_mcxn947.dtsi
+++ b/boards/nxp/frdm_mcxn947/frdm_mcxn947.dtsi
@@ -88,3 +88,41 @@
 		};
 	};
 };
+
+&flexspi {
+	pinctrl-0 = <&pinmux_flexspi>;
+	pinctrl-names = "default";
+	ahb-prefetch;
+	ahb-bufferable;
+	ahb-cacheable;
+	ahb-read-addr-opt;
+	combination-mode;
+	rx-clock-source = <1>;
+
+	/* WINBOND flash memory*/
+	w25q64jvssiq: w25q64jvssiq@0 {
+		compatible = "nxp,imx-flexspi-nor";
+		status = "disabled";
+		size = <67108864>;
+		reg = <0>;
+		spi-max-frequency = <133000000>;
+		jedec-id = [ef 40 17];
+		erase-block-size = <4096>;
+		write-block-size = <1>;
+		cs-interval-unit = <1>;
+		cs-interval = <2>;
+		cs-hold-time = <3>;
+		cs-setup-time = <3>;
+		data-valid-time = <2>;
+		column-space = <0>;
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			storage_partition: partition@0 {
+				label = "storage";
+				reg = <0x0 DT_SIZE_M(8)>;
+			};
+		};
+	};
+};
diff --git a/boards/nxp/frdm_mcxn947/frdm_mcxn947_mcxn947_cpu0.dts b/boards/nxp/frdm_mcxn947/frdm_mcxn947_mcxn947_cpu0.dts
index f69157e4b6f..a22a3623c4b 100644
--- a/boards/nxp/frdm_mcxn947/frdm_mcxn947_mcxn947_cpu0.dts
+++ b/boards/nxp/frdm_mcxn947/frdm_mcxn947_mcxn947_cpu0.dts
@@ -72,3 +72,11 @@
 &flexcomm4_lpuart4 {
 	status = "okay";
 };
+
+&flexspi {
+	status = "okay";
+};
+
+&w25q64jvssiq {
+	status = "okay";
+};