nrf_rtc_timer: clear events and counter when disabling sys_clock
Clear pending IRQ when starting and restore back the RTC1 state when disabling sys_clock, to avoid issues when soft rebooting the device or chainloading another Zephyr image (e.g. mcuboot). Change-Id: I693d9168196ad2cfb8475ecfa2051eac043b1fbd Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
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1 changed files with 14 additions and 0 deletions
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@ -292,6 +292,10 @@ int _sys_clock_driver_init(struct device *device)
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SYS_CLOCK_RTC->EVTENSET = RTC_EVTENSET_COMPARE0_Msk;
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SYS_CLOCK_RTC->EVTENSET = RTC_EVTENSET_COMPARE0_Msk;
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SYS_CLOCK_RTC->INTENSET = RTC_INTENSET_COMPARE0_Msk;
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SYS_CLOCK_RTC->INTENSET = RTC_INTENSET_COMPARE0_Msk;
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/* Clear the event flag and possible pending interrupt */
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RTC_CC_EVENT = 0;
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NVIC_ClearPendingIRQ(NRF5_IRQ_RTC1_IRQn);
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IRQ_CONNECT(NRF5_IRQ_RTC1_IRQn, 1, rtc1_nrf5_isr, 0, 0);
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IRQ_CONNECT(NRF5_IRQ_RTC1_IRQn, 1, rtc1_nrf5_isr, 0, 0);
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irq_enable(NRF5_IRQ_RTC1_IRQn);
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irq_enable(NRF5_IRQ_RTC1_IRQn);
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@ -325,9 +329,19 @@ uint32_t _timer_cycle_get_32(void)
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*/
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*/
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void sys_clock_disable(void)
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void sys_clock_disable(void)
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{
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{
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unsigned int key;
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key = irq_lock();
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irq_disable(NRF5_IRQ_RTC1_IRQn);
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irq_disable(NRF5_IRQ_RTC1_IRQn);
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SYS_CLOCK_RTC->EVTENCLR = RTC_EVTENCLR_COMPARE0_Msk;
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SYS_CLOCK_RTC->INTENCLR = RTC_INTENCLR_COMPARE0_Msk;
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SYS_CLOCK_RTC->TASKS_STOP = 1;
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SYS_CLOCK_RTC->TASKS_STOP = 1;
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SYS_CLOCK_RTC->TASKS_CLEAR = 1;
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irq_unlock(key);
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/* TODO: turn off (release) 32 KHz clock source.
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/* TODO: turn off (release) 32 KHz clock source.
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* Turning off of 32 KHz clock source is not implemented in clock
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* Turning off of 32 KHz clock source is not implemented in clock
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