From 51036ca5f4c184ed7d59a5f83c63a7aaea1efee9 Mon Sep 17 00:00:00 2001 From: Ricardo Salveti Date: Tue, 28 Feb 2017 11:41:18 -0300 Subject: [PATCH] nrf_rtc_timer: clear events and counter when disabling sys_clock Clear pending IRQ when starting and restore back the RTC1 state when disabling sys_clock, to avoid issues when soft rebooting the device or chainloading another Zephyr image (e.g. mcuboot). Change-Id: I693d9168196ad2cfb8475ecfa2051eac043b1fbd Signed-off-by: Ricardo Salveti --- drivers/timer/nrf_rtc_timer.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/timer/nrf_rtc_timer.c b/drivers/timer/nrf_rtc_timer.c index 76c704d4c24..a2575ffba95 100644 --- a/drivers/timer/nrf_rtc_timer.c +++ b/drivers/timer/nrf_rtc_timer.c @@ -292,6 +292,10 @@ int _sys_clock_driver_init(struct device *device) SYS_CLOCK_RTC->EVTENSET = RTC_EVTENSET_COMPARE0_Msk; SYS_CLOCK_RTC->INTENSET = RTC_INTENSET_COMPARE0_Msk; + /* Clear the event flag and possible pending interrupt */ + RTC_CC_EVENT = 0; + NVIC_ClearPendingIRQ(NRF5_IRQ_RTC1_IRQn); + IRQ_CONNECT(NRF5_IRQ_RTC1_IRQn, 1, rtc1_nrf5_isr, 0, 0); irq_enable(NRF5_IRQ_RTC1_IRQn); @@ -325,9 +329,19 @@ uint32_t _timer_cycle_get_32(void) */ void sys_clock_disable(void) { + unsigned int key; + + key = irq_lock(); + irq_disable(NRF5_IRQ_RTC1_IRQn); + SYS_CLOCK_RTC->EVTENCLR = RTC_EVTENCLR_COMPARE0_Msk; + SYS_CLOCK_RTC->INTENCLR = RTC_INTENCLR_COMPARE0_Msk; + SYS_CLOCK_RTC->TASKS_STOP = 1; + SYS_CLOCK_RTC->TASKS_CLEAR = 1; + + irq_unlock(key); /* TODO: turn off (release) 32 KHz clock source. * Turning off of 32 KHz clock source is not implemented in clock