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hwinfo: hwinfo_litex: Make compatible with both 8 and 32-bit CSRs

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LiteX CSRs can only be accessed on addresses aligned to 4 bytes.
That's why in 32-bit CSRs case there is bit shifting needed.

Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
This commit is contained in:
Michal Sieron 2022-04-14 14:16:39 +02:00 • committed by Carles Cufí
commit 5098aaa2d1
1 changed files with 12 additions and 7 deletions
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19
drivers/hwinfo/hwinfo_litex.c
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@ -14,14 +14,19 @@
ssize_t z_impl_hwinfo_get_device_id(uint8_t *buffer, size_t length) ssize_t z_impl_hwinfo_get_device_id(uint8_t *buffer, size_t length)
{ {
uint32_t volatile *ptr = (uint32_t volatile *)(DT_INST_REG_ADDR(0)); uint32_t addr = DT_INST_REG_ADDR(0);
ssize_t end = MIN(length, (DT_INST_REG_SIZE(0) / sizeof(uint32_t))); ssize_t end = MIN(length, DT_INST_REG_ADDR(0) / 4 *
CONFIG_LITEX_CSR_DATA_WIDTH / 8);
for (int i = 0; i < end; i++) { for (int i = 0; i < end; i++) {
/* In LiteX even though registers are 32-bit wide, each one #if CONFIG_LITEX_CSR_DATA_WIDTH == 8
contains meaningful data only in the lowest 8 bits */ buffer[i] = litex_read8(addr);
buffer[i] = (uint8_t)(ptr[i] & 0xff); addr += 4;
#elif CONFIG_LITEX_CSR_DATA_WIDTH == 32
buffer[i] = (uint8_t)(litex_read32(addr) >> (addr % 4 * 8));
addr += 1;
#else
#error Unsupported CSR data width
#endif
} }
return end; return end;
} }