soc: it8xxx2: enable CONFIG_RISCV_GP

This will bring better performance on accessing global variables
that are in 4K span by the GP register.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>

soc/riscv/riscv-ite/common/vector.S

@@ -16,6 +16,14 @@ GTEXT(__initialize)
 GTEXT(__irq_wrapper)
 
 SECTION_FUNC(vectors, __start)
+#ifdef CONFIG_RISCV_GP
+	.option push
+	.option norelax
+	/* Configure the GP register */
+	la gp, __global_pointer$
+	.option pop
+#endif
+
 	.option norvc;
 
 	/*

soc/riscv/riscv-ite/it8xxx2/Kconfig.defconfig.series

@@ -13,6 +13,9 @@ config ITE_IT8XXX2_INTC
 	select FLASH_HAS_DRIVER_ENABLED
 	select HAS_FLASH_LOAD_OFFSET
 
+config RISCV_GP
+	default y
+
 config SYS_CLOCK_HW_CYCLES_PER_SEC
 	default 32768