From 48e0dbbca4ae6e2ccc655872914016a09db1ddd6 Mon Sep 17 00:00:00 2001 From: Dino Li Date: Tue, 5 Oct 2021 17:11:14 +0800 Subject: [PATCH] soc: it8xxx2: enable CONFIG_RISCV_GP This will bring better performance on accessing global variables that are in 4K span by the GP register. Signed-off-by: Dino Li --- soc/riscv/riscv-ite/common/vector.S | 8 ++++++++ soc/riscv/riscv-ite/it8xxx2/Kconfig.defconfig.series | 3 +++ 2 files changed, 11 insertions(+) diff --git a/soc/riscv/riscv-ite/common/vector.S b/soc/riscv/riscv-ite/common/vector.S index d5062d434cc..10d8e93835c 100644 --- a/soc/riscv/riscv-ite/common/vector.S +++ b/soc/riscv/riscv-ite/common/vector.S @@ -16,6 +16,14 @@ GTEXT(__initialize) GTEXT(__irq_wrapper) SECTION_FUNC(vectors, __start) +#ifdef CONFIG_RISCV_GP + .option push + .option norelax + /* Configure the GP register */ + la gp, __global_pointer$ + .option pop +#endif + .option norvc; /* diff --git a/soc/riscv/riscv-ite/it8xxx2/Kconfig.defconfig.series b/soc/riscv/riscv-ite/it8xxx2/Kconfig.defconfig.series index c5147ad1d54..00803146694 100644 --- a/soc/riscv/riscv-ite/it8xxx2/Kconfig.defconfig.series +++ b/soc/riscv/riscv-ite/it8xxx2/Kconfig.defconfig.series @@ -13,6 +13,9 @@ config ITE_IT8XXX2_INTC select FLASH_HAS_DRIVER_ENABLED select HAS_FLASH_LOAD_OFFSET +config RISCV_GP + default y + config SYS_CLOCK_HW_CYCLES_PER_SEC default 32768