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drivers: pwm: fix an off-by-one error in the CH32V PWM driver

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The period is the reload register plus 1. Adjust. Note that the
earlier code handles the cases where the pulse time is zero or equal
to the period.

Signed-off-by: Michael Hope <michaelh@juju.nz>
This commit is contained in:
Michael Hope 2025-05-24 15:52:37 +00:00 • committed by Fabio Baltieri
commit 45e55d639d
1 changed files with 5 additions and 1 deletions
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6
drivers/pwm/pwm_wch_gptm.c
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@ -94,7 +94,11 @@ static int pwm_wch_gptm_set_cycles(const struct device *dev, uint32_t channel,
}
if (period_cycles != 0) {
regs->ATRLR = period_cycles;
/*
* Note that the period is ATRLR+1. The earlier checks handle the case where
* pulse_cycles is zero or equal to period_cycles.
*/
regs->ATRLR = period_cycles - 1;
}
/* Set the polarity and enable */