soc: nxp: s32k146: add LPI2C support
Add LPI2C nodes to S32K1xx devices. S32K146 has a single LPI2C instance. Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
This commit is contained in:
parent
8fb92ba9cd
commit
3b354bfc57
3 changed files with 25 additions and 0 deletions
|
@ -33,6 +33,8 @@
|
|||
};
|
||||
};
|
||||
|
||||
/delete-node/ &lpi2c1;
|
||||
|
||||
&nvic {
|
||||
arm,num-irq-priority-bits = <4>;
|
||||
};
|
||||
|
|
|
@ -6,6 +6,7 @@
|
|||
|
||||
#include <mem.h>
|
||||
#include <arm/armv7-m.dtsi>
|
||||
#include <zephyr/dt-bindings/i2c/i2c.h>
|
||||
|
||||
/ {
|
||||
cpus {
|
||||
|
@ -80,6 +81,27 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
lpi2c0: i2c@40066000 {
|
||||
compatible = "nxp,imx-lpi2c";
|
||||
clock-frequency = <I2C_BITRATE_STANDARD>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x40066000 0x1000>;
|
||||
interrupts = <24 0>;
|
||||
clocks = <&clock NXP_S32_LPI2C0_CLK>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
lpi2c1: i2c@40067000 {
|
||||
compatible = "nxp,imx-lpi2c";
|
||||
clock-frequency = <I2C_BITRATE_STANDARD>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x40067000 0x1000>;
|
||||
interrupts = <25 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
lpuart0: uart@4006a000 {
|
||||
compatible = "nxp,kinetis-lpuart";
|
||||
reg = <0x4006a000 0x1000>;
|
||||
|
|
|
@ -14,5 +14,6 @@ config SOC_SERIES_S32K1XX
|
|||
select MPU_ALLOW_FLASH_WRITE if !XIP
|
||||
select CLOCK_CONTROL
|
||||
select HAS_MCUX_LPUART
|
||||
select HAS_MCUX_LPI2C
|
||||
help
|
||||
Enable support for NXP S32K1XX MCU series.
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue