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drivers: spi_bitbang: Fix timing in SPI bitbang driver

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Fix timing in SPI bitbang driver.
The issue occurs with CPHA=1 when the input data is changed immediately
after the clock shift on the last bit of the read.
Because we read the input bit after changing the clock, this bit
becomes invalid.
Instead of doing wait, clock-change, read. Do wait, read, clock-change.

Signed-off-by: Joakim Andersson <joerchan@gmail.com>
This commit is contained in:
Joakim Andersson 2024-05-15 16:56:24 +02:00 • committed by Carles Cufí
commit 3ad57e3030
1 changed files with 6 additions and 6 deletions
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12
drivers/spi/spi_bitbang.c
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@ -177,22 +177,22 @@ static int spi_bitbang_transceive(const struct device *dev,
k_busy_wait(wait_us); k_busy_wait(wait_us);
/* first clock edge */
gpio_pin_set_dt(&info->clk_gpio, !clock_state);
if (!loop && do_read && !cpha) { if (!loop && do_read && !cpha) {
b = gpio_pin_get_dt(miso); b = gpio_pin_get_dt(miso);
} }
k_busy_wait(wait_us); /* first (leading) clock edge */
gpio_pin_set_dt(&info->clk_gpio, !clock_state);
/* second clock edge */ k_busy_wait(wait_us);
gpio_pin_set_dt(&info->clk_gpio, clock_state);
if (!loop && do_read && cpha) { if (!loop && do_read && cpha) {
b = gpio_pin_get_dt(miso); b = gpio_pin_get_dt(miso);
} }
/* second (trailing) clock edge */
gpio_pin_set_dt(&info->clk_gpio, clock_state);
if (loop) { if (loop) {
b = d; b = d;
} }