soc: arm: st_stm32: stm32mp1: Add SPI support

Add SPI support for STM32MP1x SoC.

Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
This commit is contained in:
Yaël Boutreux 2019-08-01 13:57:30 +02:00 committed by Maureen Helm
commit 3a967f92c3
3 changed files with 133 additions and 0 deletions

View file

@ -195,6 +195,71 @@
#define DT_GPIO_STM32_GPIOK_CLOCK_BUS \
DT_ST_STM32_GPIO_5000C000_CLOCK_BUS
#define DT_SPI_1_BASE_ADDRESS \
DT_ST_STM32_SPI_FIFO_44004000_BASE_ADDRESS
#define DT_SPI_1_IRQ_PRI \
DT_ST_STM32_SPI_FIFO_44004000_IRQ_0_PRIORITY
#define DT_SPI_1_NAME \
DT_ST_STM32_SPI_FIFO_44004000_LABEL
#define DT_SPI_1_IRQ \
DT_ST_STM32_SPI_FIFO_44004000_IRQ_0
#define DT_SPI_1_CLOCK_BITS \
DT_ST_STM32_SPI_FIFO_44004000_CLOCK_BITS
#define DT_SPI_1_CLOCK_BUS \
DT_ST_STM32_SPI_FIFO_44004000_CLOCK_BUS
#define DT_SPI_2_BASE_ADDRESS \
DT_ST_STM32_SPI_FIFO_4400B000_BASE_ADDRESS
#define DT_SPI_2_IRQ_PRI \
DT_ST_STM32_SPI_FIFO_4400B000_IRQ_0_PRIORITY
#define DT_SPI_2_NAME \
DT_ST_STM32_SPI_FIFO_4400B000_LABEL
#define DT_SPI_2_IRQ \
DT_ST_STM32_SPI_FIFO_4400B000_IRQ_0
#define DT_SPI_2_CLOCK_BITS \
DT_ST_STM32_SPI_FIFO_4400B000_CLOCK_BITS
#define DT_SPI_2_CLOCK_BUS \
DT_ST_STM32_SPI_FIFO_4400B000_CLOCK_BUS
#define DT_SPI_3_BASE_ADDRESS \
DT_ST_STM32_SPI_FIFO_4400C000_BASE_ADDRESS
#define DT_SPI_3_IRQ_PRI \
DT_ST_STM32_SPI_FIFO_4400C000_IRQ_0_PRIORITY
#define DT_SPI_3_NAME \
DT_ST_STM32_SPI_FIFO_4400C000_LABEL
#define DT_SPI_3_IRQ \
DT_ST_STM32_SPI_FIFO_4400C000_IRQ_0
#define DT_SPI_3_CLOCK_BITS \
DT_ST_STM32_SPI_FIFO_4400C000_CLOCK_BITS
#define DT_SPI_3_CLOCK_BUS \
DT_ST_STM32_SPI_FIFO_4400C000_CLOCK_BUS
#define DT_SPI_4_BASE_ADDRESS \
DT_ST_STM32_SPI_FIFO_44005000_BASE_ADDRESS
#define DT_SPI_4_IRQ_PRI \
DT_ST_STM32_SPI_FIFO_44005000_IRQ_0_PRIORITY
#define DT_SPI_4_NAME \
DT_ST_STM32_SPI_FIFO_44005000_LABEL
#define DT_SPI_4_IRQ \
DT_ST_STM32_SPI_FIFO_44005000_IRQ_0
#define DT_SPI_4_CLOCK_BITS \
DT_ST_STM32_SPI_FIFO_44005000_CLOCK_BITS
#define DT_SPI_4_CLOCK_BUS \
DT_ST_STM32_SPI_FIFO_44005000_CLOCK_BUS
#define DT_SPI_5_BASE_ADDRESS \
DT_ST_STM32_SPI_FIFO_44009000_BASE_ADDRESS
#define DT_SPI_5_IRQ_PRI \
DT_ST_STM32_SPI_FIFO_44009000_IRQ_0_PRIORITY
#define DT_SPI_5_NAME \
DT_ST_STM32_SPI_FIFO_44009000_LABEL
#define DT_SPI_5_IRQ \
DT_ST_STM32_SPI_FIFO_44009000_IRQ_0
#define DT_SPI_5_CLOCK_BITS \
DT_ST_STM32_SPI_FIFO_44009000_CLOCK_BITS
#define DT_SPI_5_CLOCK_BUS \
DT_ST_STM32_SPI_FIFO_40009000_CLOCK_BUS
#define DT_UART_STM32_USART_2_BASE_ADDRESS \
DT_ST_STM32_USART_4000E000_BASE_ADDRESS
#define DT_UART_STM32_USART_2_BAUD_RATE \