dts: pwm: add a binding for the SAM0 TCC in PWM mode
The SAM0 Timer/Counter for Control Applications can act as a counter or generator. Add a binding for the TCC in PWM mode and helper to check the compat mode. Signed-off-by: Michael Hope <mlhx@google.com>
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dts/bindings/pwm/atmel,sam0-tcc-pwm.yaml
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62
dts/bindings/pwm/atmel,sam0-tcc-pwm.yaml
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# Copyright (c) 2020 Google LLC.
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# SPDX-License-Identifier: Apache-2.0
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description: Atmel SAM0 TCC in PWM mode
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compatible: "atmel,sam0-tcc-pwm"
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include: [pwm-controller.yaml, base.yaml]
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properties:
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reg:
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required: true
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interrupts:
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required: true
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clocks:
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required: true
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clock-names:
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required: true
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label:
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required: true
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channels:
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type: int
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required: true
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description: Number of channels this TCC has
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enum:
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- 2
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- 3
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- 4
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- 6
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counter-size:
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type: int
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required: true
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description: Width of the TCC counter in bits
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enum:
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- 16
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- 24
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prescaler:
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type: int
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required: true
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description: PWM prescaler
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enum:
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- 1
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- 2
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- 4
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- 8
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- 16
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- 64
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- 256
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- 1024
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"#pwm-cells":
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const: 1
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pwm-cells:
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- channel
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@ -39,6 +39,10 @@
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#define ATMEL_SAM0_DT_SERCOM_CHECK(n, compat) \
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DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(sercom##n), compat, okay)
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/* Use to check if TCC 'n' is enabled for a given 'compat' */
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#define ATMEL_SAM0_DT_TCC_CHECK(n, compat) \
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DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(tcc##n), compat, okay)
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/* Common macro for use to set HCLK_FREQ_HZ */
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#define ATMEL_SAM0_DT_CPU_CLK_FREQ_HZ \
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DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency)
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