From 38cfd6c2e6b42dd6f4b24b6c4c9847b8008225d9 Mon Sep 17 00:00:00 2001
From: Michael Hope <mlhx@google.com>
Date: Fri, 12 Jun 2020 22:08:10 +0200
Subject: [PATCH] dts: pwm: add a binding for the SAM0 TCC in PWM mode

The SAM0 Timer/Counter for Control Applications can act as a counter
or generator.  Add a binding for the TCC in PWM mode and helper to
check the compat mode.

Signed-off-by: Michael Hope <mlhx@google.com>
---
 dts/bindings/pwm/atmel,sam0-tcc-pwm.yaml  | 62 +++++++++++++++++++++++
 soc/arm/atmel_sam0/common/atmel_sam0_dt.h |  4 ++
 2 files changed, 66 insertions(+)
 create mode 100644 dts/bindings/pwm/atmel,sam0-tcc-pwm.yaml

diff --git a/dts/bindings/pwm/atmel,sam0-tcc-pwm.yaml b/dts/bindings/pwm/atmel,sam0-tcc-pwm.yaml
new file mode 100644
index 00000000000..0a080c60703
--- /dev/null
+++ b/dts/bindings/pwm/atmel,sam0-tcc-pwm.yaml
@@ -0,0 +1,62 @@
+# Copyright (c) 2020 Google LLC.
+# SPDX-License-Identifier: Apache-2.0
+
+description: Atmel SAM0 TCC in PWM mode
+
+compatible: "atmel,sam0-tcc-pwm"
+
+include: [pwm-controller.yaml, base.yaml]
+
+properties:
+  reg:
+    required: true
+
+  interrupts:
+    required: true
+
+  clocks:
+    required: true
+
+  clock-names:
+    required: true
+
+  label:
+    required: true
+
+  channels:
+    type: int
+    required: true
+    description: Number of channels this TCC has
+    enum:
+      - 2
+      - 3
+      - 4
+      - 6
+
+  counter-size:
+    type: int
+    required: true
+    description: Width of the TCC counter in bits
+    enum:
+      - 16
+      - 24
+
+  prescaler:
+    type: int
+    required: true
+    description: PWM prescaler
+    enum:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 64
+      - 256
+      - 1024
+
+  "#pwm-cells":
+    const: 1
+
+pwm-cells:
+  - channel
diff --git a/soc/arm/atmel_sam0/common/atmel_sam0_dt.h b/soc/arm/atmel_sam0/common/atmel_sam0_dt.h
index 9d9567b0154..1e31511fa5c 100644
--- a/soc/arm/atmel_sam0/common/atmel_sam0_dt.h
+++ b/soc/arm/atmel_sam0/common/atmel_sam0_dt.h
@@ -39,6 +39,10 @@
 #define ATMEL_SAM0_DT_SERCOM_CHECK(n, compat) \
 	DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(sercom##n), compat, okay)
 
+/* Use to check if TCC 'n' is enabled for a given 'compat' */
+#define ATMEL_SAM0_DT_TCC_CHECK(n, compat) \
+	DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(tcc##n), compat, okay)
+
 /* Common macro for use to set HCLK_FREQ_HZ */
 #define ATMEL_SAM0_DT_CPU_CLK_FREQ_HZ \
 	DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency)