diff --git a/soc/arm/nxp_imx/rt/soc.c b/soc/arm/nxp_imx/rt/soc.c
index c8054afa5c2..9088f6abfce 100644
--- a/soc/arm/nxp_imx/rt/soc.c
+++ b/soc/arm/nxp_imx/rt/soc.c
@@ -133,11 +133,11 @@ static int imxrt_init(struct device *arg)
 	oldLevel = irq_lock();
 
 	/* Watchdog disable */
-	if (WDOG1->WCR & WDOG_WCR_WDE_MASK) {
+	if ((WDOG1->WCR & WDOG_WCR_WDE_MASK) != 0) {
 		WDOG1->WCR &= ~WDOG_WCR_WDE_MASK;
 	}
 
-	if (WDOG2->WCR & WDOG_WCR_WDE_MASK) {
+	if ((WDOG2->WCR & WDOG_WCR_WDE_MASK) != 0) {
 		WDOG2->WCR &= ~WDOG_WCR_WDE_MASK;
 	}
 
@@ -147,12 +147,12 @@ static int imxrt_init(struct device *arg)
 		| RTWDOG_CS_UPDATE_MASK;
 
 	/* Disable Systick which might be enabled by bootrom */
-	if (SysTick->CTRL & SysTick_CTRL_ENABLE_Msk) {
+	if ((SysTick->CTRL & SysTick_CTRL_ENABLE_Msk) != 0) {
 		SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
 	}
 
 	SCB_EnableICache();
-	if (!(SCB->CCR & SCB_CCR_DC_Msk)) {
+	if ((SCB->CCR & SCB_CCR_DC_Msk) == 0) {
 		SCB_EnableDCache();
 	}
 
diff --git a/soc/arm/st_stm32/stm32f0/soc_gpio.c b/soc/arm/st_stm32/stm32f0/soc_gpio.c
index ab0a669e5f2..de15879d45e 100644
--- a/soc/arm/st_stm32/stm32f0/soc_gpio.c
+++ b/soc/arm/st_stm32/stm32f0/soc_gpio.c
@@ -27,7 +27,7 @@ int stm32_gpio_flags_to_conf(int flags, int *pincfg)
 	int direction = flags & GPIO_DIR_MASK;
 	int pud = flags & GPIO_PUD_MASK;
 
-	if (!pincfg) {
+	if (pincfg == NULL) {
 		return -EINVAL;
 	}
 
@@ -88,7 +88,7 @@ int stm32_gpio_set(u32_t *base, int pin, int value)
 
 	int pval = 1 << (pin & 0xf);
 
-	if (value) {
+	if (value != 0) {
 		gpio->odr |= pval;
 	} else {
 		gpio->odr &= ~pval;
diff --git a/soc/arm/st_stm32/stm32f1/soc_gpio.c b/soc/arm/st_stm32/stm32f1/soc_gpio.c
index 73dd1fe8144..fd96567076f 100644
--- a/soc/arm/st_stm32/stm32f1/soc_gpio.c
+++ b/soc/arm/st_stm32/stm32f1/soc_gpio.c
@@ -29,7 +29,7 @@ int stm32_gpio_flags_to_conf(int flags, int *pincfg)
 {
 	int direction = flags & GPIO_DIR_MASK;
 
-	if (!pincfg) {
+	if (pincfg == NULL) {
 		return -EINVAL;
 	}
 
@@ -140,7 +140,7 @@ int stm32_gpio_set(u32_t *base, int pin, int value)
 
 	int pval = 1 << (pin & 0xf);
 
-	if (value) {
+	if (value != 0) {
 		gpio->odr |= pval;
 	} else {
 		gpio->odr &= ~pval;
diff --git a/soc/arm/st_stm32/stm32f2/soc_gpio.c b/soc/arm/st_stm32/stm32f2/soc_gpio.c
index cdd979a4309..f56a035dcc3 100644
--- a/soc/arm/st_stm32/stm32f2/soc_gpio.c
+++ b/soc/arm/st_stm32/stm32f2/soc_gpio.c
@@ -27,7 +27,7 @@ int stm32_gpio_flags_to_conf(int flags, int *pincfg)
 	int direction = flags & GPIO_DIR_MASK;
 	int pud = flags & GPIO_PUD_MASK;
 
-	if (!pincfg) {
+	if (pincfg == NULL) {
 		return -EINVAL;
 	}
 
@@ -88,7 +88,7 @@ int stm32_gpio_set(u32_t *base, int pin, int value)
 
 	int pval = 1 << (pin & 0xf);
 
-	if (value) {
+	if (value != 0) {
 		gpio->odr |= pval;
 	} else {
 		gpio->odr &= ~pval;
diff --git a/soc/arm/st_stm32/stm32f3/soc_gpio.c b/soc/arm/st_stm32/stm32f3/soc_gpio.c
index 0bbb9fed203..97f484d8c1b 100644
--- a/soc/arm/st_stm32/stm32f3/soc_gpio.c
+++ b/soc/arm/st_stm32/stm32f3/soc_gpio.c
@@ -28,7 +28,7 @@ int stm32_gpio_flags_to_conf(int flags, int *pincfg)
 	int direction = flags & GPIO_DIR_MASK;
 	int pud = flags & GPIO_PUD_MASK;
 
-	if (!pincfg) {
+	if (pincfg == NULL) {
 		return -EINVAL;
 	}
 
@@ -90,7 +90,7 @@ int stm32_gpio_set(u32_t *base, int pin, int value)
 
 	int pval = 1 << (pin & 0xf);
 
-	if (value) {
+	if (value != 0) {
 		gpio->odr |= pval;
 	} else {
 		gpio->odr &= ~pval;
diff --git a/soc/arm/st_stm32/stm32f4/soc_gpio.c b/soc/arm/st_stm32/stm32f4/soc_gpio.c
index 6134105f870..1a2acbc3173 100644
--- a/soc/arm/st_stm32/stm32f4/soc_gpio.c
+++ b/soc/arm/st_stm32/stm32f4/soc_gpio.c
@@ -28,7 +28,7 @@ int stm32_gpio_flags_to_conf(int flags, int *pincfg)
 	int direction = flags & GPIO_DIR_MASK;
 	int pud = flags & GPIO_PUD_MASK;
 
-	if (!pincfg) {
+	if (pincfg == NULL) {
 		return -EINVAL;
 	}
 
@@ -88,7 +88,7 @@ int stm32_gpio_set(u32_t *base, int pin, int value)
 {
 	struct stm32f4x_gpio *gpio = (struct stm32f4x_gpio *)base;
 
-	if (value) {
+	if (value != 0) {
 		/* atomic set */
 		gpio->bsr = (1 << (pin & 0x0f));
 	} else {
diff --git a/soc/arm/st_stm32/stm32f7/soc_gpio.c b/soc/arm/st_stm32/stm32f7/soc_gpio.c
index b2d690d14c0..8b855a58bf9 100644
--- a/soc/arm/st_stm32/stm32f7/soc_gpio.c
+++ b/soc/arm/st_stm32/stm32f7/soc_gpio.c
@@ -28,7 +28,7 @@ int stm32_gpio_flags_to_conf(int flags, int *pincfg)
 	int direction = flags & GPIO_DIR_MASK;
 	int pud = flags & GPIO_PUD_MASK;
 
-	if (!pincfg) {
+	if (pincfg == NULL) {
 		return -EINVAL;
 	}
 
@@ -88,7 +88,7 @@ int stm32_gpio_set(u32_t *base, int pin, int value)
 {
 	struct stm32f7x_gpio *gpio = (struct stm32f7x_gpio *)base;
 
-	if (value) {
+	if (value != 0) {
 		/* atomic set */
 		gpio->bsrr = (1 << (pin & 0x0f));
 	} else {
diff --git a/soc/arm/st_stm32/stm32l0/soc_gpio.c b/soc/arm/st_stm32/stm32l0/soc_gpio.c
index b2812ad4d87..823582d1b91 100644
--- a/soc/arm/st_stm32/stm32l0/soc_gpio.c
+++ b/soc/arm/st_stm32/stm32l0/soc_gpio.c
@@ -27,7 +27,7 @@ int stm32_gpio_flags_to_conf(int flags, int *pincfg)
 	int direction = flags & GPIO_DIR_MASK;
 	int pud = flags & GPIO_PUD_MASK;
 
-	if (!pincfg) {
+	if (pincfg == NULL) {
 		return -EINVAL;
 	}
 
@@ -88,7 +88,7 @@ int stm32_gpio_set(u32_t *base, int pin, int value)
 
 	int pval = 1 << (pin & 0xf);
 
-	if (value) {
+	if (value != 0) {
 		gpio->odr |= pval;
 	} else {
 		gpio->odr &= ~pval;
diff --git a/soc/arm/st_stm32/stm32l4/soc_gpio.c b/soc/arm/st_stm32/stm32l4/soc_gpio.c
index 60a202cace7..2adcebb84d4 100644
--- a/soc/arm/st_stm32/stm32l4/soc_gpio.c
+++ b/soc/arm/st_stm32/stm32l4/soc_gpio.c
@@ -54,7 +54,7 @@ int stm32_gpio_flags_to_conf(int flags, int *pincfg)
 	int direction = flags & GPIO_DIR_MASK;
 	int pud = flags & GPIO_PUD_MASK;
 
-	if (!pincfg) {
+	if (pincfg == NULL) {
 		return -EINVAL;
 	}
 
@@ -115,7 +115,7 @@ int stm32_gpio_set(u32_t *base, int pin, int value)
 	struct stm32l4x_gpio *gpio = (struct stm32l4x_gpio *)base;
 	int pval = 1 << (pin & 0xf);
 
-	if (value) {
+	if (value != 0) {
 		gpio->odr |= pval;
 	} else {
 		gpio->odr &= ~pval;