From 33ee93d7dd86bad78e1a9102eea7ce8c522ab4b9 Mon Sep 17 00:00:00 2001 From: Maureen Helm Date: Fri, 4 Nov 2016 08:37:32 -0500 Subject: [PATCH] serial/uart_k20: Fix instance source clock frequencies The uart_k20 serial driver incorrectly assumed that all instances of the UART peripheral are driven by the system clock, when actually some instances are driven by the bus clock (which usually runs at half the system clock). This caused incorrect baud rate calculations for UART instances driven by the bus clock (UART2-4). Change-Id: I38041781cdee146912bb5167e7c71d6416b966b5 Signed-off-by: Maureen Helm --- arch/arm/soc/nxp_kinetis/k6x/soc.h | 9 +++++++-- drivers/serial/uart_k20.c | 10 +++++----- 2 files changed, 12 insertions(+), 7 deletions(-) diff --git a/arch/arm/soc/nxp_kinetis/k6x/soc.h b/arch/arm/soc/nxp_kinetis/k6x/soc.h index 7ec7b16c183..61fb2247055 100644 --- a/arch/arm/soc/nxp_kinetis/k6x/soc.h +++ b/arch/arm/soc/nxp_kinetis/k6x/soc.h @@ -34,6 +34,8 @@ extern "C" { /* default system clock */ #define SYSCLK_DEFAULT_IOSC_HZ MHZ(120) +#define BUSCLK_DEFAULT_IOSC_HZ (SYSCLK_DEFAULT_IOSC_HZ / \ + CONFIG_K64_BUS_CLOCK_DIVIDER) /* address bases */ @@ -153,22 +155,25 @@ extern "C" { #include -#define UART_K20_CLK_FREQ SYSCLK_DEFAULT_IOSC_HZ - #define UART_IRQ_FLAGS 0 +#define UART_K20_PORT_0_CLK_FREQ SYSCLK_DEFAULT_IOSC_HZ #define UART_K20_PORT_0_BASE_ADDR 0x4006A000 #define UART_K20_PORT_0_IRQ IRQ_UART0_STATUS +#define UART_K20_PORT_1_CLK_FREQ SYSCLK_DEFAULT_IOSC_HZ #define UART_K20_PORT_1_BASE_ADDR 0x4006B000 #define UART_K20_PORT_1_IRQ IRQ_UART1_STATUS +#define UART_K20_PORT_2_CLK_FREQ BUSCLK_DEFAULT_IOSC_HZ #define UART_K20_PORT_2_BASE_ADDR 0x4006C000 #define UART_K20_PORT_2_IRQ IRQ_UART2_STATUS +#define UART_K20_PORT_3_CLK_FREQ BUSCLK_DEFAULT_IOSC_HZ #define UART_K20_PORT_3_BASE_ADDR 0x4006D000 #define UART_K20_PORT_3_IRQ IRQ_UART3_STATUS +#define UART_K20_PORT_4_CLK_FREQ BUSCLK_DEFAULT_IOSC_HZ #define UART_K20_PORT_4_BASE_ADDR 0x400EA000 #define UART_K20_PORT_4_IRQ IRQ_UART4_STATUS diff --git a/drivers/serial/uart_k20.c b/drivers/serial/uart_k20.c index 86c5ea62669..710665bf17d 100644 --- a/drivers/serial/uart_k20.c +++ b/drivers/serial/uart_k20.c @@ -416,7 +416,7 @@ static void irq_config_func_0(struct device *port); static const struct uart_device_config uart_k20_dev_cfg_0 = { .base = (uint8_t *)UART_K20_PORT_0_BASE_ADDR, - .sys_clk_freq = UART_K20_CLK_FREQ, + .sys_clk_freq = UART_K20_PORT_0_CLK_FREQ, #ifdef CONFIG_UART_INTERRUPT_DRIVEN .irq_config_func = irq_config_func_0, @@ -453,7 +453,7 @@ static void irq_config_func_1(struct device *port); static const struct uart_device_config uart_k20_dev_cfg_1 = { .base = (uint8_t *)UART_K20_PORT_1_BASE_ADDR, - .sys_clk_freq = UART_K20_CLK_FREQ, + .sys_clk_freq = UART_K20_PORT_1_CLK_FREQ, #ifdef CONFIG_UART_INTERRUPT_DRIVEN .irq_config_func = irq_config_func_1, @@ -490,7 +490,7 @@ static void irq_config_func_2(struct device *port); static const struct uart_device_config uart_k20_dev_cfg_2 = { .base = (uint8_t *)UART_K20_PORT_2_BASE_ADDR, - .sys_clk_freq = UART_K20_CLK_FREQ, + .sys_clk_freq = UART_K20_PORT_2_CLK_FREQ, #ifdef CONFIG_UART_INTERRUPT_DRIVEN .irq_config_func = irq_config_func_2, @@ -527,7 +527,7 @@ static void irq_config_func_3(struct device *port); static struct uart_device_config uart_k20_dev_cfg_3 = { .base = (uint8_t *)UART_K20_PORT_3_BASE_ADDR, - .sys_clk_freq = UART_K20_CLK_FREQ, + .sys_clk_freq = UART_K20_PORT_3_CLK_FREQ, #ifdef CONFIG_UART_INTERRUPT_DRIVEN .irq_config_func = irq_config_func_3, @@ -564,7 +564,7 @@ static void irq_config_func_4(struct device *port); static const struct uart_device_config uart_k20_dev_cfg_4 = { .base = (uint8_t *)UART_K20_PORT_4_BASE_ADDR, - .sys_clk_freq = UART_K20_CLK_FREQ, + .sys_clk_freq = UART_K20_PORT_4_CLK_FREQ, #ifdef CONFIG_UART_INTERRUPT_DRIVEN .irq_config_func = irq_config_func_4,