drivers/can: stm32: use new pinctrl API
Use the new pinctrl API to configure pins. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
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3 changed files with 8 additions and 24 deletions
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@ -6,7 +6,7 @@
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#include <drivers/clock_control/stm32_clock_control.h>
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#include <drivers/clock_control/stm32_clock_control.h>
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#include <drivers/clock_control.h>
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#include <drivers/clock_control.h>
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#include <pinmux/pinmux_stm32.h>
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#include <drivers/pinctrl.h>
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#include <sys/util.h>
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#include <sys/util.h>
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#include <string.h>
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#include <string.h>
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#include <kernel.h>
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#include <kernel.h>
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@ -454,9 +454,7 @@ static int can_stm32_init(const struct device *dev)
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}
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}
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/* Configure dt provided device signals when available */
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/* Configure dt provided device signals when available */
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ret = stm32_dt_pinctrl_configure(cfg->pinctrl,
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ret = pinctrl_apply_state(cfg->pcfg, PINCTRL_STATE_DEFAULT);
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cfg->pinctrl_len,
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(uint32_t)cfg->can);
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if (ret < 0) {
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if (ret < 0) {
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LOG_ERR("CAN pinctrl setup failed (%d)", ret);
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LOG_ERR("CAN pinctrl setup failed (%d)", ret);
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return ret;
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return ret;
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@ -1133,8 +1131,7 @@ static const struct can_driver_api can_api_funcs = {
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static void config_can_1_irq(CAN_TypeDef *can);
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static void config_can_1_irq(CAN_TypeDef *can);
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static const struct soc_gpio_pinctrl pins_can_1[] =
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PINCTRL_DT_DEFINE(DT_NODELABEL(can1))
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ST_STM32_DT_PINCTRL(can1, 0);
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static const struct can_stm32_config can_stm32_cfg_1 = {
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static const struct can_stm32_config can_stm32_cfg_1 = {
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.can = (CAN_TypeDef *)DT_REG_ADDR(DT_NODELABEL(can1)),
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.can = (CAN_TypeDef *)DT_REG_ADDR(DT_NODELABEL(can1)),
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@ -1150,8 +1147,7 @@ static const struct can_stm32_config can_stm32_cfg_1 = {
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.bus = DT_CLOCKS_CELL(DT_NODELABEL(can1), bus),
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.bus = DT_CLOCKS_CELL(DT_NODELABEL(can1), bus),
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},
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},
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.config_irq = config_can_1_irq,
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.config_irq = config_can_1_irq,
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.pinctrl = pins_can_1,
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.pcfg = PINCTRL_DT_DEV_CONFIG_GET(DT_NODELABEL(can1))
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.pinctrl_len = ARRAY_SIZE(pins_can_1)
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};
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};
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static struct can_stm32_data can_stm32_dev_data_1;
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static struct can_stm32_data can_stm32_dev_data_1;
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@ -1231,8 +1227,7 @@ NET_DEVICE_INIT(socket_can_stm32_1, SOCKET_CAN_NAME_1, socket_can_init_1,
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static void config_can_2_irq(CAN_TypeDef *can);
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static void config_can_2_irq(CAN_TypeDef *can);
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static const struct soc_gpio_pinctrl pins_can_2[] =
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PINCTRL_DT_DEFINE(DT_NODELABEL(can2))
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ST_STM32_DT_PINCTRL(can2, 0);
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static const struct can_stm32_config can_stm32_cfg_2 = {
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static const struct can_stm32_config can_stm32_cfg_2 = {
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.can = (CAN_TypeDef *)DT_REG_ADDR(DT_NODELABEL(can2)),
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.can = (CAN_TypeDef *)DT_REG_ADDR(DT_NODELABEL(can2)),
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@ -1249,8 +1244,7 @@ static const struct can_stm32_config can_stm32_cfg_2 = {
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.bus = DT_CLOCKS_CELL(DT_NODELABEL(can2), bus),
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.bus = DT_CLOCKS_CELL(DT_NODELABEL(can2), bus),
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},
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},
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.config_irq = config_can_2_irq,
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.config_irq = config_can_2_irq,
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.pinctrl = pins_can_2,
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.pcfg = PINCTRL_DT_DEV_CONFIG_GET(DT_NODELABEL(can2))
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.pinctrl_len = ARRAY_SIZE(pins_can_2)
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};
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};
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static struct can_stm32_data can_stm32_dev_data_2;
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static struct can_stm32_data can_stm32_dev_data_2;
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@ -77,8 +77,7 @@ struct can_stm32_config {
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uint8_t ts2;
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uint8_t ts2;
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struct stm32_pclken pclken;
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struct stm32_pclken pclken;
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void (*config_irq)(CAN_TypeDef *can);
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void (*config_irq)(CAN_TypeDef *can);
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const struct soc_gpio_pinctrl *pinctrl;
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const struct pinctrl_dev_config *pcfg;
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size_t pinctrl_len;
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};
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};
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#endif /*ZEPHYR_DRIVERS_CAN_STM32_CAN_H_*/
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#endif /*ZEPHYR_DRIVERS_CAN_STM32_CAN_H_*/
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@ -2,7 +2,7 @@ description: STM32 CAN controller
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compatible: "st,stm32-can"
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compatible: "st,stm32-can"
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include: can-controller.yaml
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include: [can-controller.yaml, pinctrl-device.yaml]
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properties:
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properties:
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reg:
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reg:
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@ -14,15 +14,6 @@ properties:
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clocks:
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clocks:
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required: true
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required: true
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pinctrl-0:
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type: phandles
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required: false
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description: |
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GPIO pin configuration for CAN RX and TX. The phandles are
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expected to reference pinctrl nodes, e.g.
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pinctrl-0 = <&can1_rx_pa11 &can1_tx_pa12>;
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master-can-reg:
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master-can-reg:
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type: int
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type: int
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required: false
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required: false
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