From 337c9b96e95bde3a777af7d0c9a0509716382de1 Mon Sep 17 00:00:00 2001
From: Erwan Gouriou <erwan.gouriou@linaro.org>
Date: Fri, 5 Nov 2021 15:21:13 +0100
Subject: [PATCH] drivers/can: stm32: use new pinctrl API

Use the new pinctrl API to configure pins.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
---
 drivers/can/can_stm32.c            | 18 ++++++------------
 drivers/can/can_stm32.h            |  3 +--
 dts/bindings/can/st,stm32-can.yaml | 11 +----------
 3 files changed, 8 insertions(+), 24 deletions(-)

diff --git a/drivers/can/can_stm32.c b/drivers/can/can_stm32.c
index 2b0fbebbe9d..cf55c4a9c0d 100644
--- a/drivers/can/can_stm32.c
+++ b/drivers/can/can_stm32.c
@@ -6,7 +6,7 @@
 
 #include <drivers/clock_control/stm32_clock_control.h>
 #include <drivers/clock_control.h>
-#include <pinmux/pinmux_stm32.h>
+#include <drivers/pinctrl.h>
 #include <sys/util.h>
 #include <string.h>
 #include <kernel.h>
@@ -454,9 +454,7 @@ static int can_stm32_init(const struct device *dev)
 	}
 
 	/* Configure dt provided device signals when available */
-	ret = stm32_dt_pinctrl_configure(cfg->pinctrl,
-					 cfg->pinctrl_len,
-					 (uint32_t)cfg->can);
+	ret = pinctrl_apply_state(cfg->pcfg, PINCTRL_STATE_DEFAULT);
 	if (ret < 0) {
 		LOG_ERR("CAN pinctrl setup failed (%d)", ret);
 		return ret;
@@ -1133,8 +1131,7 @@ static const struct can_driver_api can_api_funcs = {
 
 static void config_can_1_irq(CAN_TypeDef *can);
 
-static const struct soc_gpio_pinctrl pins_can_1[] =
-	ST_STM32_DT_PINCTRL(can1, 0);
+PINCTRL_DT_DEFINE(DT_NODELABEL(can1))
 
 static const struct can_stm32_config can_stm32_cfg_1 = {
 	.can = (CAN_TypeDef *)DT_REG_ADDR(DT_NODELABEL(can1)),
@@ -1150,8 +1147,7 @@ static const struct can_stm32_config can_stm32_cfg_1 = {
 		.bus = DT_CLOCKS_CELL(DT_NODELABEL(can1), bus),
 	},
 	.config_irq = config_can_1_irq,
-	.pinctrl = pins_can_1,
-	.pinctrl_len = ARRAY_SIZE(pins_can_1)
+	.pcfg = PINCTRL_DT_DEV_CONFIG_GET(DT_NODELABEL(can1))
 };
 
 static struct can_stm32_data can_stm32_dev_data_1;
@@ -1231,8 +1227,7 @@ NET_DEVICE_INIT(socket_can_stm32_1, SOCKET_CAN_NAME_1, socket_can_init_1,
 
 static void config_can_2_irq(CAN_TypeDef *can);
 
-static const struct soc_gpio_pinctrl pins_can_2[] =
-	ST_STM32_DT_PINCTRL(can2, 0);
+PINCTRL_DT_DEFINE(DT_NODELABEL(can2))
 
 static const struct can_stm32_config can_stm32_cfg_2 = {
 	.can = (CAN_TypeDef *)DT_REG_ADDR(DT_NODELABEL(can2)),
@@ -1249,8 +1244,7 @@ static const struct can_stm32_config can_stm32_cfg_2 = {
 		.bus = DT_CLOCKS_CELL(DT_NODELABEL(can2), bus),
 	},
 	.config_irq = config_can_2_irq,
-	.pinctrl = pins_can_2,
-	.pinctrl_len = ARRAY_SIZE(pins_can_2)
+	.pcfg = PINCTRL_DT_DEV_CONFIG_GET(DT_NODELABEL(can2))
 };
 
 static struct can_stm32_data can_stm32_dev_data_2;
diff --git a/drivers/can/can_stm32.h b/drivers/can/can_stm32.h
index 0e8241ca0a9..cf279197eab 100644
--- a/drivers/can/can_stm32.h
+++ b/drivers/can/can_stm32.h
@@ -77,8 +77,7 @@ struct can_stm32_config {
 	uint8_t ts2;
 	struct stm32_pclken pclken;
 	void (*config_irq)(CAN_TypeDef *can);
-	const struct soc_gpio_pinctrl *pinctrl;
-	size_t pinctrl_len;
+	const struct pinctrl_dev_config *pcfg;
 };
 
 #endif /*ZEPHYR_DRIVERS_CAN_STM32_CAN_H_*/
diff --git a/dts/bindings/can/st,stm32-can.yaml b/dts/bindings/can/st,stm32-can.yaml
index 0d018bd6f87..136f168572f 100644
--- a/dts/bindings/can/st,stm32-can.yaml
+++ b/dts/bindings/can/st,stm32-can.yaml
@@ -2,7 +2,7 @@ description: STM32 CAN controller
 
 compatible: "st,stm32-can"
 
-include: can-controller.yaml
+include: [can-controller.yaml, pinctrl-device.yaml]
 
 properties:
     reg:
@@ -14,15 +14,6 @@ properties:
     clocks:
       required: true
 
-    pinctrl-0:
-      type: phandles
-      required: false
-      description: |
-        GPIO pin configuration for CAN RX and TX. The phandles are
-        expected to reference pinctrl nodes, e.g.
-
-          pinctrl-0 = <&can1_rx_pa11 &can1_tx_pa12>;
-
     master-can-reg:
       type: int
       required: false